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x86/elf: Improve code generation in elf_core_save_regs()
A CALL with 0 displacement is handled specially, and is why this logic
functions even with CET Shadow Stacks active. Nevertheless a RIP-relative LEA
is the more normal way of doing this in 64bit code.
The retrieval of flags modifies the stack pointer so needs to state a
dependency on the stack pointer. Despite it's name, ASM_CALL_CONSTRAINT is
the way to do this.
read_sreg() forces the answer through a register, causing code generation of
the form:
mov %gs, %eax
mov %eax, %eax
mov %rax, 0x140(%rsi)
Encode the reads directly with a memory operand. This results in a 16bit
store instead of an 64bit store, but the backing memory is zeroed.
While cleaning this up, drop one piece of trailing whitespace.
No functional change.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
This commit is contained in:
1 parent
2f3a1491ab
commit
0754534b8a
1 file changed
+9
-9
@@ -34,7 +34,7 @@ typedef struct {
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unsigned long gs;
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} ELF_Gregset;
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static inline void elf_core_save_regs(ELF_Gregset *core_regs,
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static inline void elf_core_save_regs(ELF_Gregset *core_regs,
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crash_xen_core_t *xen_core_regs)
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{
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asm ( "movq %%r15, %0" : "=m" (core_regs->r15) );
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@@ -54,17 +54,17 @@ static inline void elf_core_save_regs(ELF_Gregset *core_regs,
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asm ( "movq %%rdi, %0" : "=m" (core_regs->rdi) );
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/* orig_rax not filled in for now */
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asm ( "call 0f; 0: popq %0" : "=m" (core_regs->rip) );
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core_regs->cs = read_sreg(cs);
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asm ( "pushfq; popq %0" : "=m" (core_regs->rflags) );
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asm ( "lea (%%rip), %0" : "=r" (core_regs->rip) );
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asm ( "mov %%cs, %0" : "=m" (core_regs->cs) );
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asm ( "pushfq; popq %0" : "=m" (core_regs->rflags) ASM_CALL_CONSTRAINT );
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asm ( "movq %%rsp, %0" : "=m" (core_regs->rsp) );
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core_regs->ss = read_sreg(ss);
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asm ( "mov %%ss, %0" : "=m" (core_regs->ss) );
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rdmsrl(MSR_FS_BASE, core_regs->thread_fs);
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rdmsrl(MSR_GS_BASE, core_regs->thread_gs);
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core_regs->ds = read_sreg(ds);
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core_regs->es = read_sreg(es);
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core_regs->fs = read_sreg(fs);
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core_regs->gs = read_sreg(gs);
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asm ( "mov %%ds, %0" : "=m" (core_regs->ds) );
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asm ( "mov %%es, %0" : "=m" (core_regs->es) );
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asm ( "mov %%fs, %0" : "=m" (core_regs->fs) );
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asm ( "mov %%gs, %0" : "=m" (core_regs->gs) );
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asm ( "mov %%cr0, %0" : "=r" (xen_core_regs->cr0) );
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asm ( "mov %%cr2, %0" : "=r" (xen_core_regs->cr2) );
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