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x86emul: correct EFLAGS.TF handling
For repeated string instructions we should not emulate multiple iterations in one go when a single step trap needs injecting (which needs to happen after every iteration). For all non-branch instructions as well as not taken conditional branches we additionally need to take DebugCtl.BTF into consideration. For mov-to/pop-into %ss there should be no #DB at all (EFLAGS.TF remaining set means there'll be #DB after the next instruction). Additionally retire.sti should remain clear when retire.singlestep gets set to true. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citirx.com>
This commit is contained in:
1 parent
4fb1aceed5
commit
14a6be89ec
1 file changed
+27
-3
@@ -415,6 +415,8 @@ typedef union {
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#define MSR_SYSENTER_CS 0x00000174
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#define MSR_SYSENTER_ESP 0x00000175
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#define MSR_SYSENTER_EIP 0x00000176
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#define MSR_DEBUGCTL 0x000001d9
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#define DEBUGCTL_BTF (1 << 1)
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#define MSR_EFER 0xc0000080
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#define MSR_STAR 0xc0000081
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#define MSR_LSTAR 0xc0000082
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@@ -755,6 +757,7 @@ do { \
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rc = ops->insn_fetch(x86_seg_cs, ip, NULL, 0, ctxt); \
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if ( rc ) goto done; \
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_regs.r(ip) = ip; \
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singlestep = _regs._eflags & EFLG_TF; \
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} while (0)
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#define validate_far_branch(cs, ip) ({ \
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@@ -771,6 +774,7 @@ do { \
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#define commit_far_branch(cs, newip) ({ \
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validate_far_branch(cs, newip); \
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_regs.r(ip) = (newip); \
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singlestep = _regs._eflags & EFLG_TF; \
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ops->write_segment(x86_seg_cs, cs, ctxt); \
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})
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@@ -951,6 +955,9 @@ static inline void put_loop_count(
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} \
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goto no_writeback; \
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} \
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if ( max_reps > 1 && (_regs._eflags & EFLG_TF) && \
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!is_branch_step(ctxt, ops) ) \
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max_reps = 1; \
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max_reps; \
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})
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@@ -1672,6 +1679,16 @@ static bool is_aligned(enum x86_segment seg, unsigned long offs,
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return !((reg.base + offs) & (size - 1));
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}
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static bool is_branch_step(struct x86_emulate_ctxt *ctxt,
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const struct x86_emulate_ops *ops)
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{
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uint64_t debugctl;
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return ops->read_msr &&
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ops->read_msr(MSR_DEBUGCTL, &debugctl, ctxt) == X86EMUL_OKAY &&
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(debugctl & DEBUGCTL_BTF);
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}
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static bool umip_active(struct x86_emulate_ctxt *ctxt,
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const struct x86_emulate_ops *ops)
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{
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@@ -2516,7 +2533,7 @@ x86_emulate(
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struct x86_emulate_state state;
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int rc;
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uint8_t b, d;
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bool singlestep = _regs._eflags & EFLG_TF;
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bool singlestep = (_regs._eflags & EFLG_TF) && !is_branch_step(ctxt, ops);
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struct operand src = { .reg = PTR_POISON };
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struct operand dst = { .reg = PTR_POISON };
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enum x86_swint_type swint_type;
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@@ -3206,6 +3223,7 @@ x86_emulate(
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goto done;
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_regs.r(ip) = imm1;
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singlestep = _regs._eflags & EFLG_TF;
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break;
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case 0x9b: /* wait/fwait */
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@@ -5085,6 +5103,7 @@ x86_emulate(
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goto done;
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_regs.r(sp) = lm ? msr_content : (uint32_t)msr_content;
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singlestep = _regs._eflags & EFLG_TF;
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break;
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}
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@@ -5125,6 +5144,8 @@ x86_emulate(
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_regs.r(ip) = op_bytes == 8 ? _regs.r(dx) : _regs._edx;
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_regs.r(sp) = op_bytes == 8 ? _regs.r(cx) : _regs._ecx;
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singlestep = _regs._eflags & EFLG_TF;
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break;
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}
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@@ -5750,8 +5771,11 @@ x86_emulate(
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_regs.r(ip) = _regs._eip;
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/* Should a singlestep #DB be raised? */
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if ( rc == X86EMUL_OKAY )
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ctxt->retire.singlestep = singlestep;
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if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss )
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{
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ctxt->retire.singlestep = true;
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ctxt->retire.sti = false;
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}
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if ( rc != X86EMUL_DONE )
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*ctxt->regs = _regs;
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