From 40b05620e24a936ad03c21c6fba4d48202c5f0d4 Mon Sep 17 00:00:00 2001 From: Demi Marie Obenour Date: Thu, 5 Jan 2023 16:19:43 +0100 Subject: [PATCH] x86/mm: avoid hard-coding PAT in get_page_from_l1e() get_page_from_l1e() relied on Xen's choice of PAT, which is brittle in the face of future PAT changes. Instead, compute the actual cacheability used by the CPU and switch on that, as this will work no matter what PAT Xen uses. No functional change intended. This code is itself questionable and may be removed in the future, but removing it would be an observable behavior change and so is out of scope for this patch series. Signed-off-by: Demi Marie Obenour Reviewed-by: Jan Beulich --- xen/arch/x86/mm.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 8fa29d5c8b..0fe14faa5f 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -956,14 +956,17 @@ get_page_from_l1e( flip = _PAGE_RW; } - switch ( l1f & PAGE_CACHE_ATTRS ) + switch ( 0xFF & (XEN_MSR_PAT >> (8 * pte_flags_to_cacheattr(l1f))) ) { - case 0: /* WB */ - flip |= _PAGE_PWT | _PAGE_PCD; + case X86_MT_UC: + case X86_MT_UCM: + case X86_MT_WC: + /* not cacheable, allow */ break; - case _PAGE_PWT: /* WT */ - case _PAGE_PWT | _PAGE_PAT: /* WP */ - flip |= _PAGE_PCD | (l1f & _PAGE_PAT); + + default: + /* potentially cacheable, force to UC */ + flip |= ((l1f & PAGE_CACHE_ATTRS) ^ _PAGE_UC); break; }