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xen/sm{e, a}p: allow disabling sm{e, a}p for Xen itself
SMEP/SMAP is a security feature to prevent kernel executing/accessing
user address involuntarily, any such behavior will lead to a page fault.
SMEP/SMAP is open (in CR4) for both Xen and HVM guest in earlier code.
SMEP/SMAP bit set in Xen CR4 would enforce security checking for 32-bit
PV guest which will suffer unknown SMEP/SMAP page fault when guest
kernel attempt to access user address although SMEP/SMAP is close for
PV guests.
This patch introduces a new boot option value "hvm" for "sm{e,a}p", it
is going to diable SMEP/SMAP for Xen hypervisor while enable them for
HVM. In this way, 32-bit PV guest will not suffer SMEP/SMAP security
issue. Users can choose whether open SMEP/SMAP for Xen itself,
especially when they are going to run 32-bit PV guests.
Signed-off-by: He Chen <he.chen@linux.intel.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Release-acked-by: Wei Liu <wei.liu2@citrix.com>
[Fixed up command line docs]
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
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6 files changed
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-27
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@@ -1433,19 +1433,21 @@ enabling more sockets and cores to go into deeper sleep states.
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Set the serial transmit buffer size.
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### smep
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> `= <boolean>`
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> Default: `true`
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Flag to enable Supervisor Mode Execution Protection
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### smap
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> `= <boolean>`
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> `= <boolean> | hvm`
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> Default: `true`
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Flag to enable Supervisor Mode Access Prevention
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Use `smap=hvm` to allow SMAP use by HVM guests only.
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### smep
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> `= <boolean> | hvm`
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> Default: `true`
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Flag to enable Supervisor Mode Execution Protection
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Use `smep=hvm` to allow SMEP use by HVM guests only.
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### snb\_igd\_quirk
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> `= <boolean> | cap | <integer>`
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+58
-10
@@ -61,14 +61,6 @@ boolean_param("nosmp", opt_nosmp);
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static unsigned int __initdata max_cpus;
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integer_param("maxcpus", max_cpus);
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/* smep: Enable/disable Supervisor Mode Execution Protection (default on). */
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static bool_t __initdata opt_smep = 1;
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boolean_param("smep", opt_smep);
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/* smap: Enable/disable Supervisor Mode Access Prevention (default on). */
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static bool_t __initdata opt_smap = 1;
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boolean_param("smap", opt_smap);
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unsigned long __read_mostly cr4_pv32_mask;
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/* Boot dom0 in pvh mode */
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@@ -112,6 +104,58 @@ struct cpuinfo_x86 __read_mostly boot_cpu_data = { 0, 0, 0, 0, -1 };
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unsigned long __read_mostly mmu_cr4_features = XEN_MINIMAL_CR4;
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/* smep: Enable/disable Supervisor Mode Execution Protection (default on). */
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#define SMEP_HVM_ONLY (-1)
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static s8 __initdata opt_smep = 1;
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static void __init parse_smep_param(char *s)
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{
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if ( !*s )
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{
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opt_smep = 1;
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return;
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}
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switch ( parse_bool(s) )
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{
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case 0:
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opt_smep = 0;
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return;
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case 1:
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opt_smep = 1;
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return;
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}
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if ( !strcmp(s, "hvm") )
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opt_smep = SMEP_HVM_ONLY;
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}
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custom_param("smep", parse_smep_param);
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/* smap: Enable/disable Supervisor Mode Access Prevention (default on). */
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#define SMAP_HVM_ONLY (-1)
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static s8 __initdata opt_smap = 1;
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static void __init parse_smap_param(char *s)
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{
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if ( !*s )
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{
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opt_smap = 1;
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return;
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}
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switch ( parse_bool(s) )
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{
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case 0:
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opt_smap = 0;
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return;
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case 1:
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opt_smap = 1;
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return;
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}
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if ( !strcmp(s, "hvm") )
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opt_smap = SMAP_HVM_ONLY;
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}
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custom_param("smap", parse_smap_param);
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bool_t __read_mostly acpi_disabled;
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bool_t __initdata acpi_force;
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static char __initdata acpi_param[10] = "";
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@@ -1404,12 +1448,16 @@ void __init noreturn __start_xen(unsigned long mbi_p)
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if ( !opt_smep )
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setup_clear_cpu_cap(X86_FEATURE_SMEP);
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if ( cpu_has_smep )
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if ( cpu_has_smep && opt_smep != SMEP_HVM_ONLY )
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__set_bit(X86_FEATURE_XEN_SMEP, boot_cpu_data.x86_capability);
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if ( boot_cpu_has(X86_FEATURE_XEN_SMEP) )
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set_in_cr4(X86_CR4_SMEP);
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if ( !opt_smap )
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setup_clear_cpu_cap(X86_FEATURE_SMAP);
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if ( cpu_has_smap )
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if ( cpu_has_smap && opt_smap != SMAP_HVM_ONLY )
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__set_bit(X86_FEATURE_XEN_SMAP, boot_cpu_data.x86_capability);
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if ( boot_cpu_has(X86_FEATURE_XEN_SMAP) )
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set_in_cr4(X86_CR4_SMAP);
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cr4_pv32_mask = mmu_cr4_features & XEN_CR4_PV32_BITS;
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@@ -137,10 +137,10 @@ ENTRY(compat_restore_all_guest)
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.section .altinstructions, "a"
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altinstruction_entry .Lcr4_orig, .Lcr4_orig, X86_FEATURE_ALWAYS, \
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(.Lcr4_orig_end - .Lcr4_orig), 0
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altinstruction_entry .Lcr4_orig, .Lcr4_alt, X86_FEATURE_SMEP, \
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altinstruction_entry .Lcr4_orig, .Lcr4_alt, X86_FEATURE_XEN_SMEP, \
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(.Lcr4_orig_end - .Lcr4_orig), \
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(.Lcr4_alt_end - .Lcr4_alt)
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altinstruction_entry .Lcr4_orig, .Lcr4_alt, X86_FEATURE_SMAP, \
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altinstruction_entry .Lcr4_orig, .Lcr4_alt, X86_FEATURE_XEN_SMAP, \
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(.Lcr4_orig_end - .Lcr4_orig), \
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(.Lcr4_alt_end - .Lcr4_alt)
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.popsection
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@@ -417,11 +417,11 @@ handle_exception_saved:
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.Lcr4_pv32_alt_end:
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.section .altinstructions, "a"
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altinstruction_entry .Lcr4_pv32_orig, .Lcr4_pv32_alt, \
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X86_FEATURE_SMEP, \
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X86_FEATURE_XEN_SMEP, \
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(.Lcr4_pv32_alt_end - .Lcr4_pv32_alt), \
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(.Lcr4_pv32_alt_end - .Lcr4_pv32_alt)
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altinstruction_entry .Lcr4_pv32_orig, .Lcr4_pv32_alt, \
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X86_FEATURE_SMAP, \
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X86_FEATURE_XEN_SMAP, \
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(.Lcr4_pv32_alt_end - .Lcr4_pv32_alt), \
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(.Lcr4_pv32_alt_end - .Lcr4_pv32_alt)
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.popsection
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@@ -205,7 +205,7 @@ void ret_from_intr(void);
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.popsection; \
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.pushsection .altinstructions, "a"; \
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altinstruction_entry 661b, 661b, X86_FEATURE_ALWAYS, 3, 0; \
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altinstruction_entry 661b, 662b, X86_FEATURE_SMAP, 3, 3; \
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altinstruction_entry 661b, 662b, X86_FEATURE_XEN_SMAP, 3, 3; \
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.popsection
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#define ASM_STAC ASM_AC(STAC)
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@@ -217,21 +217,21 @@ void ret_from_intr(void);
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668: call cr4_pv32_restore; \
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.section .altinstructions, "a"; \
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altinstruction_entry 667b, 667b, X86_FEATURE_ALWAYS, 5, 0; \
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altinstruction_entry 667b, 668b, X86_FEATURE_SMEP, 5, 5; \
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altinstruction_entry 667b, 668b, X86_FEATURE_SMAP, 5, 5; \
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altinstruction_entry 667b, 668b, X86_FEATURE_XEN_SMEP, 5, 5; \
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altinstruction_entry 667b, 668b, X86_FEATURE_XEN_SMAP, 5, 5; \
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.popsection
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#else
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static always_inline void clac(void)
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{
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/* Note: a barrier is implicit in alternative() */
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alternative(ASM_NOP3, __stringify(__ASM_CLAC), X86_FEATURE_SMAP);
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alternative(ASM_NOP3, __stringify(__ASM_CLAC), X86_FEATURE_XEN_SMAP);
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}
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static always_inline void stac(void)
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{
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/* Note: a barrier is implicit in alternative() */
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alternative(ASM_NOP3, __stringify(__ASM_STAC), X86_FEATURE_SMAP);
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alternative(ASM_NOP3, __stringify(__ASM_STAC), X86_FEATURE_XEN_SMAP);
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}
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#endif
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@@ -17,6 +17,8 @@ XEN_CPUFEATURE(CPUID_FAULTING, (FSCAPINTS+0)*32+ 6) /* cpuid faulting */
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XEN_CPUFEATURE(CLFLUSH_MONITOR, (FSCAPINTS+0)*32+ 7) /* clflush reqd with monitor */
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XEN_CPUFEATURE(APERFMPERF, (FSCAPINTS+0)*32+ 8) /* APERFMPERF */
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XEN_CPUFEATURE(MFENCE_RDTSC, (FSCAPINTS+0)*32+ 9) /* MFENCE synchronizes RDTSC */
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XEN_CPUFEATURE(XEN_SMEP, (FSCAPINTS+0)*32+ 10) /* SMEP gets used by Xen itself */
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XEN_CPUFEATURE(XEN_SMAP, (FSCAPINTS+0)*32+ 11) /* SMAP gets used by Xen itself */
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#define NCAPINTS (FSCAPINTS + 1) /* N 32-bit words worth of info */
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