diff --git a/xen/arch/x86/cpu/mcheck/mce_amd.c b/xen/arch/x86/cpu/mcheck/mce_amd.c
index 5873511f5e..787ce961b6 100644
--- a/xen/arch/x86/cpu/mcheck/mce_amd.c
+++ b/xen/arch/x86/cpu/mcheck/mce_amd.c
@@ -329,7 +329,7 @@ amd_mcheck_init(struct cpuinfo_x86 *ci)
             rdmsrl(MSR_AMD_PPIN_CTL, val);
         }
 
-        if ( (val & (PPIN_ENABLE | PPIN_LOCKOUT)) != PPIN_ENABLE )
+        if ( !(val & PPIN_ENABLE) )
             ppin_msr = 0;
         else if ( ci == &boot_cpu_data )
             ppin_msr = MSR_AMD_PPIN;
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c
index 29b9983172..bb9f3a3ff7 100644
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c
+++ b/xen/arch/x86/cpu/mcheck/mce_intel.c
@@ -885,7 +885,7 @@ static void intel_init_ppin(const struct cpuinfo_x86 *c)
             rdmsr_safe(MSR_PPIN_CTL, val);
         }
 
-        if ( (val & (PPIN_ENABLE | PPIN_LOCKOUT)) != PPIN_ENABLE )
+        if ( !(val & PPIN_ENABLE) )
             ppin_msr = 0;
         else if ( c == &boot_cpu_data )
             ppin_msr = MSR_PPIN;