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x86/mm: skip super-page alignment checks for non-present entries
INVALID_MFN is ~0, so by it having all bits as 1s it doesn't fulfill the super-page address alignment checks for L3 and L2 entries. Skip the alignment checks if the new entry is a non-present one. This fixes a regression introduced by0b6b51a69f, where the switch from 0 to INVALID_MFN caused all super-pages to be shattered when attempting to remove mappings by passing INVALID_MFN instead of 0. Fixes:0b6b51a69f('xen/mm: Switch map_pages_to_xen to use MFN typesafe') Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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1 parent
97fb6fcf26
commit
5b52e1b043
1 file changed
+14
-6
+14
-6
@@ -5493,10 +5493,17 @@ int map_pages_to_xen(
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} \
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} while (0)
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/* Check if a (virt, mfn) tuple is aligned for a given slot level. */
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#define IS_LnE_ALIGNED(v, m, n) \
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IS_ALIGNED(PFN_DOWN(v) | mfn_x(m), \
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(1UL << (PAGETABLE_ORDER * ((n) - 1))) - 1)
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/*
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* Check if a (virt, mfn) tuple is aligned for a given slot level. m must not
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* be INVALID_MFN, since alignment is only relevant for present entries.
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*/
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#define IS_LnE_ALIGNED(v, m, n) ({ \
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mfn_t m_ = m; \
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\
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ASSERT(!mfn_eq(m_, INVALID_MFN)); \
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IS_ALIGNED(PFN_DOWN(v) | mfn_x(m_), \
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(1UL << (PAGETABLE_ORDER * ((n) - 1))) - 1); \
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})
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#define IS_L2E_ALIGNED(v, m) IS_LnE_ALIGNED(v, m, 2)
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#define IS_L3E_ALIGNED(v, m) IS_LnE_ALIGNED(v, m, 3)
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@@ -5517,7 +5524,8 @@ int map_pages_to_xen(
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L3T_LOCK(current_l3page);
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ol3e = *pl3e;
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if ( cpu_has_page1gb && IS_L3E_ALIGNED(virt, mfn) &&
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if ( cpu_has_page1gb &&
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(!(flags & _PAGE_PRESENT) || IS_L3E_ALIGNED(virt, mfn)) &&
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nr_mfns >= (1UL << (L3_PAGETABLE_SHIFT - PAGE_SHIFT)) &&
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!(flags & (_PAGE_PAT | MAP_SMALL_PAGES)) )
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{
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@@ -5636,7 +5644,7 @@ int map_pages_to_xen(
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if ( !pl2e )
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goto out;
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if ( IS_L2E_ALIGNED(virt, mfn) &&
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if ( (!(flags & _PAGE_PRESENT) || IS_L2E_ALIGNED(virt, mfn)) &&
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(nr_mfns >= (1u << PAGETABLE_ORDER)) &&
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!(flags & (_PAGE_PAT|MAP_SMALL_PAGES)) )
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{
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