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x86/desc: Build boot_{,compat_}gdt[] in C
... where we can at least get the compiler to fill in the surrounding space without having to do it manually. This also results in the symbols having proper type/size information in the debug symbols. Reorder 'raw' in the seg_desc_t union to allow for easier initialisation. Leave a comment explaining the various restrictions we have on altering the GDT layout. No functional change. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Introduce SEL2GDT(). Correct GDT indices in public header comments. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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@@ -21,6 +21,7 @@ obj-$(CONFIG_PV) += compat.o x86_64/compat.o
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obj-$(CONFIG_KEXEC) += crash.o
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obj-y += debug.o
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obj-y += delay.o
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obj-y += desc.o
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obj-bin-y += dmi_scan.init.o
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obj-y += domctl.o
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obj-y += domain.o
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@@ -2,7 +2,6 @@
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#include <xen/multiboot2.h>
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#include <public/xen.h>
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#include <asm/asm_defns.h>
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#include <asm/desc.h>
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#include <asm/fixmap.h>
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#include <asm/page.h>
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#include <asm/processor.h>
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@@ -43,44 +43,11 @@ ENTRY(__high_start)
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multiboot_ptr:
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.long 0
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.word 0
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GLOBAL(boot_gdtr)
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.word LAST_RESERVED_GDT_BYTE
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.quad boot_gdt - FIRST_RESERVED_GDT_BYTE
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GLOBAL(stack_start)
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.quad cpu0_stack
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.section .data.page_aligned, "aw", @progbits
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.align PAGE_SIZE, 0
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GLOBAL(boot_gdt)
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.quad 0x0000000000000000 /* unused */
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.quad 0x00af9b000000ffff /* 0xe008 ring 0 code, 64-bit mode */
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.quad 0x00cf93000000ffff /* 0xe010 ring 0 data */
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.quad 0x0000000000000000 /* reserved */
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.quad 0x00cffb000000ffff /* 0xe023 ring 3 code, compatibility */
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.quad 0x00cff3000000ffff /* 0xe02b ring 3 data */
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.quad 0x00affb000000ffff /* 0xe033 ring 3 code, 64-bit mode */
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.quad 0x00cf9b000000ffff /* 0xe038 ring 0 code, compatibility */
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.fill (PER_CPU_GDT_ENTRY - __HYPERVISOR_CS32 / 8 - 1), 8, 0
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.quad 0x0000910000000000 /* per-CPU entry (limit == cpu) */
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.align PAGE_SIZE, 0
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/* NB. Even rings != 0 get access to the full 4Gb, as only the */
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/* (compatibility) machine->physical mapping table lives there. */
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GLOBAL(boot_compat_gdt)
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.quad 0x0000000000000000 /* unused */
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.quad 0x00af9b000000ffff /* 0xe008 ring 0 code, 64-bit mode */
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.quad 0x00cf93000000ffff /* 0xe010 ring 0 data */
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.quad 0x00cfbb000000ffff /* 0xe019 ring 1 code, compatibility */
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.quad 0x00cfb3000000ffff /* 0xe021 ring 1 data */
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.quad 0x00cffb000000ffff /* 0xe02b ring 3 code, compatibility */
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.quad 0x00cff3000000ffff /* 0xe033 ring 3 data */
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.quad 0x00cf9b000000ffff /* 0xe038 ring 0 code, compatibility */
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.fill (PER_CPU_GDT_ENTRY - __HYPERVISOR_CS32 / 8 - 1), 8, 0
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.quad 0x0000910000000000 /* per-CPU entry (limit == cpu) */
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.align PAGE_SIZE, 0
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/*
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* Mapping of first 2 megabytes of memory. This is mapped with 4kB mappings
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* to avoid type conflicts with fixed-range MTRRs covering the lowest megabyte
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@@ -0,0 +1,109 @@
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#include <xen/init.h>
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#include <xen/lib.h>
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#include <xen/mm.h>
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#include <xen/percpu.h>
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#include <asm/desc.h>
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/*
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* Native and Compat GDTs used by Xen.
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*
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* The R1 and R3 descriptors are fixed in Xen's ABI for PV guests. All other
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* descriptors are in principle variable, with the following restrictions.
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*
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* All R0 descriptors must line up in both GDTs to allow for correct
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* interrupt/exception handling.
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*
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* The SYSCALL/SYSRET GDT layout requires:
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* - R0 long mode code followed by R0 data.
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* - R3 compat code, followed by R3 data, followed by R3 long mode code.
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*
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* The SYSENTER GDT layout requirements are compatible with SYSCALL. Xen does
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* not use the SYSEXIT instruction, and does not provide a compatible GDT.
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*
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* These tables are used directly by CPU0, and used as the template for the
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* GDTs of other CPUs. Everything from the TSS onwards is unique per CPU.
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*/
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#define SEL2GDT(sel) (((sel) >> 3) - FIRST_RESERVED_GDT_ENTRY)
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__section(".data.page_aligned") __aligned(PAGE_SIZE)
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seg_desc_t boot_gdt[PAGE_SIZE / sizeof(seg_desc_t)] =
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{
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/* 0xe008 - Ring 0 code, 64bit mode */
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[SEL2GDT(__HYPERVISOR_CS64)] = { 0x00af9b000000ffff },
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/* 0xe010 - Ring 0 data */
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[SEL2GDT(__HYPERVISOR_DS32)] = { 0x00cf93000000ffff },
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/* 0xe018 - reserved */
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/* 0xe023 - Ring 3 code, compatibility */
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[SEL2GDT(FLAT_RING3_CS32)] = { 0x00cffb000000ffff },
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/* 0xe02b - Ring 3 data */
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[SEL2GDT(FLAT_RING3_DS32)] = { 0x00cff3000000ffff },
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/* 0xe033 - Ring 3 code, 64-bit mode */
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[SEL2GDT(FLAT_RING3_CS64)] = { 0x00affb000000ffff },
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/* 0xe038 - Ring 0 code, compatibility */
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[SEL2GDT(__HYPERVISOR_CS32)] = { 0x00cf9b000000ffff },
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/* 0xe040 - TSS */
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/* 0xe050 - LDT */
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/* 0xe060 - per-CPU entry (limit == cpu) */
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[SEL2GDT(PER_CPU_SELECTOR)] = { 0x0000910000000000 },
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};
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__section(".data.page_aligned") __aligned(PAGE_SIZE)
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seg_desc_t boot_compat_gdt[PAGE_SIZE / sizeof(seg_desc_t)] =
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{
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/* 0xe008 - Ring 0 code, 64bit mode */
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[SEL2GDT(__HYPERVISOR_CS64)] = { 0x00af9b000000ffff },
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/* 0xe010 - Ring 0 data */
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[SEL2GDT(__HYPERVISOR_DS32)] = { 0x00cf93000000ffff },
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/* 0xe019 - Ring 1 code, compatibility */
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[SEL2GDT(FLAT_COMPAT_RING1_CS)] = { 0x00cfbb000000ffff },
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/* 0xe021 - Ring 1 data */
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[SEL2GDT(FLAT_COMPAT_RING1_DS)] = { 0x00cfb3000000ffff },
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/* 0xe02b - Ring 3 code, compatibility */
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[SEL2GDT(FLAT_COMPAT_RING3_CS)] = { 0x00cffb000000ffff },
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/* 0xe033 - Ring 3 data */
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[SEL2GDT(FLAT_COMPAT_RING3_DS)] = { 0x00cff3000000ffff },
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/* 0xe038 - Ring 0 code, compatibility */
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[SEL2GDT(__HYPERVISOR_CS32)] = { 0x00cf9b000000ffff },
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/* 0xe040 - TSS */
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/* 0xe050 - LDT */
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/* 0xe060 - per-CPU entry (limit == cpu) */
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[SEL2GDT(PER_CPU_SELECTOR)] = { 0x0000910000000000 },
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};
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/*
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* Used by each CPU as it starts up, to enter C with a suitable %cs.
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* References boot_cpu_gdt_table for a short period, until the CPUs switch
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* onto their per-CPU GDTs.
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*/
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struct desc_ptr boot_gdtr = {
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.limit = LAST_RESERVED_GDT_BYTE,
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.base = (unsigned long)(boot_gdt - FIRST_RESERVED_GDT_ENTRY),
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};
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/*
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* Local variables:
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* mode: C
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* c-file-style: "BSD"
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* c-basic-offset: 4
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* tab-width: 4
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* indent-tabs-mode: nil
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* End:
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*/
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@@ -107,10 +107,10 @@
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#define SYS_DESC_trap_gate 15
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typedef union {
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uint64_t raw;
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struct {
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uint32_t a, b;
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};
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uint64_t raw;
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} seg_desc_t;
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typedef union {
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@@ -44,11 +44,11 @@
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*/
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#define FLAT_RING3_CS32 0xe023 /* GDT index 260 */
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#define FLAT_RING3_CS64 0xe033 /* GDT index 261 */
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#define FLAT_RING3_DS32 0xe02b /* GDT index 262 */
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#define FLAT_RING3_CS64 0xe033 /* GDT index 262 */
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#define FLAT_RING3_DS32 0xe02b /* GDT index 261 */
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#define FLAT_RING3_DS64 0x0000 /* NULL selector */
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#define FLAT_RING3_SS32 0xe02b /* GDT index 262 */
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#define FLAT_RING3_SS64 0xe02b /* GDT index 262 */
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#define FLAT_RING3_SS32 0xe02b /* GDT index 261 */
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#define FLAT_RING3_SS64 0xe02b /* GDT index 261 */
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#define FLAT_KERNEL_DS64 FLAT_RING3_DS64
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#define FLAT_KERNEL_DS32 FLAT_RING3_DS32
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