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x86emul: support AVX512{F,_VBMI2} compress/expand insns
Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
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7 files changed
+276
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@@ -109,6 +109,7 @@ static const struct test avx512f_all[] = {
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INSN_FP(cmp, 0f, c2),
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INSN(comisd, 66, 0f, 2f, el, q, el),
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INSN(comiss, , 0f, 2f, el, d, el),
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INSN(compress, 66, 0f38, 8a, vl, sd, el),
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INSN(cvtdq2pd, f3, 0f, e6, vl_2, d, vl),
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INSN(cvtdq2ps, , 0f, 5b, vl, d, vl),
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INSN(cvtpd2dq, f2, 0f, e6, vl, q, vl),
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@@ -140,6 +141,7 @@ static const struct test avx512f_all[] = {
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INSN(cvtusi2sd, f2, 0f, 7b, el, dq64, el),
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INSN(cvtusi2ss, f3, 0f, 7b, el, dq64, el),
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INSN_FP(div, 0f, 5e),
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INSN(expand, 66, 0f38, 88, vl, sd, el),
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INSN(fixupimm, 66, 0f3a, 54, vl, sd, vl),
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INSN(fixupimm, 66, 0f3a, 55, el, sd, el),
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INSN(fmadd132, 66, 0f38, 98, vl, sd, vl),
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@@ -214,6 +216,7 @@ static const struct test avx512f_all[] = {
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INSN(pcmpgtd, 66, 0f, 66, vl, d, vl),
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INSN(pcmpgtq, 66, 0f38, 37, vl, q, vl),
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INSN(pcmpu, 66, 0f3a, 1e, vl, dq, vl),
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INSN(pcompress, 66, 0f38, 8b, vl, dq, el),
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INSN(permi2, 66, 0f38, 76, vl, dq, vl),
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INSN(permi2, 66, 0f38, 77, vl, sd, vl),
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INSN(permilpd, 66, 0f38, 0d, vl, q, vl),
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@@ -222,6 +225,7 @@ static const struct test avx512f_all[] = {
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INSN(permilps, 66, 0f3a, 04, vl, d, vl),
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INSN(permt2, 66, 0f38, 7e, vl, dq, vl),
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INSN(permt2, 66, 0f38, 7f, vl, sd, vl),
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INSN(pexpand, 66, 0f38, 89, vl, dq, el),
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INSN(pmaxs, 66, 0f38, 3d, vl, dq, vl),
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INSN(pmaxu, 66, 0f38, 3f, vl, dq, vl),
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INSN(pmins, 66, 0f38, 39, vl, dq, vl),
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@@ -509,6 +513,11 @@ static const struct test avx512_vbmi_all[] = {
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INSN(permt2b, 66, 0f38, 7d, vl, b, vl),
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};
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static const struct test avx512_vbmi2_all[] = {
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INSN(pcompress, 66, 0f38, 63, vl, bw, el),
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INSN(pexpand, 66, 0f38, 62, vl, bw, el),
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};
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static const unsigned char vl_all[] = { VL_512, VL_128, VL_256 };
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static const unsigned char vl_128[] = { VL_128 };
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static const unsigned char vl_no128[] = { VL_512, VL_256 };
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@@ -865,4 +874,5 @@ void evex_disp8_test(void *instr, struct x86_emulate_ctxt *ctxt,
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RUN(avx512dq, 512);
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RUN(avx512er, 512);
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RUN(avx512_vbmi, all);
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RUN(avx512_vbmi2, all);
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}
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@@ -3995,6 +3995,227 @@ int main(int argc, char **argv)
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else
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printf("skipped\n");
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/*
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* The following compress/expand tests are not only making sure the
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* accessed data is correct, but they also verify (by placing operands
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* on the mapping boundaries) that elements controlled by clear mask
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* bits don't get accessed.
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*/
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if ( stack_exec && cpu_has_avx512f )
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{
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decl_insn(vpcompressd);
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decl_insn(vpcompressq);
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decl_insn(vpexpandd);
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decl_insn(vpexpandq);
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static const struct {
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unsigned int d[16];
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} dsrc = { { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 } };
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static const struct {
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unsigned long long q[8];
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} qsrc = { { 0, 1, 2, 3, 4, 5, 6, 7 } };
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unsigned int *ptr = res + MMAP_SZ / sizeof(*res) - 32;
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printf("%-40s", "Testing vpcompressd %zmm1,24*4(%ecx){%k2}...");
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asm volatile ( "kmovw %1, %%k2\n\t"
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"vmovdqu32 %2, %%zmm1\n"
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put_insn(vpcompressd,
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"vpcompressd %%zmm1, 24*4(%0)%{%%k2%}")
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:: "c" (NULL), "r" (0x55aa), "m" (dsrc) );
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memset(ptr, 0xdb, 32 * 4);
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set_insn(vpcompressd);
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regs.ecx = (unsigned long)ptr;
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rc = x86_emulate(&ctxt, &emulops);
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if ( rc != X86EMUL_OKAY || !check_eip(vpcompressd) ||
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memcmp(ptr, ptr + 8, 16 * 4) )
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goto fail;
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for ( i = 0; i < 4; ++i )
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if ( ptr[24 + i] != 2 * i + 1 )
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goto fail;
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for ( ; i < 8; ++i )
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if ( ptr[24 + i] != 2 * i )
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goto fail;
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printf("okay\n");
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printf("%-40s", "Testing vpexpandd 8*4(%edx),%zmm3{%k2}{z}...");
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asm volatile ( "vpternlogd $0x81, %%zmm3, %%zmm3, %%zmm3\n"
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put_insn(vpexpandd,
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"vpexpandd 8*4(%0), %%zmm3%{%%k2%}%{z%}")
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:: "d" (NULL) );
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set_insn(vpexpandd);
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regs.edx = (unsigned long)(ptr + 16);
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rc = x86_emulate(&ctxt, &emulops);
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if ( rc != X86EMUL_OKAY || !check_eip(vpexpandd) )
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goto fail;
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asm ( "vmovdqa32 %%zmm1, %%zmm2%{%%k2%}%{z%}\n\t"
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"vpcmpeqd %%zmm2, %%zmm3, %%k0\n\t"
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"kmovw %%k0, %0"
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: "=r" (rc) );
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if ( rc != 0xffff )
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goto fail;
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printf("okay\n");
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printf("%-40s", "Testing vpcompressq %zmm4,12*8(%edx){%k3}...");
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asm volatile ( "kmovw %1, %%k3\n\t"
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"vmovdqu64 %2, %%zmm4\n"
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put_insn(vpcompressq,
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"vpcompressq %%zmm4, 12*8(%0)%{%%k3%}")
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:: "d" (NULL), "r" (0x5a), "m" (qsrc) );
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memset(ptr, 0xdb, 16 * 8);
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set_insn(vpcompressq);
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regs.edx = (unsigned long)ptr;
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rc = x86_emulate(&ctxt, &emulops);
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if ( rc != X86EMUL_OKAY || !check_eip(vpcompressq) ||
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memcmp(ptr, ptr + 8, 8 * 8) )
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goto fail;
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for ( i = 0; i < 2; ++i )
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{
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if ( ptr[(12 + i) * 2] != 2 * i + 1 ||
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ptr[(12 + i) * 2 + 1] )
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goto fail;
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}
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for ( ; i < 4; ++i )
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{
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if ( ptr[(12 + i) * 2] != 2 * i ||
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ptr[(12 + i) * 2 + 1] )
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goto fail;
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}
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printf("okay\n");
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printf("%-40s", "Testing vpexpandq 4*8(%ecx),%zmm5{%k3}{z}...");
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asm volatile ( "vpternlogq $0x81, %%zmm5, %%zmm5, %%zmm5\n"
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put_insn(vpexpandq,
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"vpexpandq 4*8(%0), %%zmm5%{%%k3%}%{z%}")
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:: "c" (NULL) );
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set_insn(vpexpandq);
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regs.ecx = (unsigned long)(ptr + 16);
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rc = x86_emulate(&ctxt, &emulops);
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if ( rc != X86EMUL_OKAY || !check_eip(vpexpandq) )
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goto fail;
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asm ( "vmovdqa64 %%zmm4, %%zmm6%{%%k3%}%{z%}\n\t"
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"vpcmpeqq %%zmm5, %%zmm6, %%k0\n\t"
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"kmovw %%k0, %0"
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: "=r" (rc) );
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if ( rc != 0xff )
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goto fail;
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printf("okay\n");
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}
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#if __GNUC__ > 7 /* can't check for __AVX512VBMI2__ here */
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if ( stack_exec && cpu_has_avx512_vbmi2 )
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{
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decl_insn(vpcompressb);
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decl_insn(vpcompressw);
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decl_insn(vpexpandb);
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decl_insn(vpexpandw);
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static const struct {
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unsigned char b[64];
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} bsrc = { { 0, 1, 2, 3, 4, 5, 6, 7,
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8, 9, 10, 11, 12, 13, 14, 15,
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16, 17, 18, 19, 20, 21, 22, 23,
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24, 25, 26, 27, 28, 29, 30, 31,
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32, 33, 34, 35, 36, 37, 38, 39,
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40, 41, 42, 43, 44, 45, 46, 47,
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48, 49, 50, 51, 52, 53, 54, 55,
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56, 57, 58, 59, 60, 61, 62, 63 } };
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static const struct {
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unsigned short w[32];
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} wsrc = { { 0, 1, 2, 3, 4, 5, 6, 7,
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8, 9, 10, 11, 12, 13, 14, 15,
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16, 17, 18, 19, 20, 21, 22, 23,
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24, 25, 26, 27, 28, 29, 30, 31 } };
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unsigned char *ptr = (void *)res + MMAP_SZ - 128;
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unsigned long long w = 0x55555555aaaaaaaaULL;
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printf("%-40s", "Testing vpcompressb %zmm1,96*1(%ecx){%k2}...");
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asm volatile ( "kmovq %1, %%k2\n\t"
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"vmovdqu8 %2, %%zmm1\n"
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put_insn(vpcompressb,
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"vpcompressb %%zmm1, 96*1(%0)%{%%k2%}")
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:: "c" (NULL), "m" (w), "m" (bsrc) );
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memset(ptr, 0xdb, 128 * 1);
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set_insn(vpcompressb);
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regs.ecx = (unsigned long)ptr;
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rc = x86_emulate(&ctxt, &emulops);
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if ( rc != X86EMUL_OKAY || !check_eip(vpcompressb) ||
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memcmp(ptr, ptr + 32, 64 * 1) )
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goto fail;
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for ( i = 0; i < 16; ++i )
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if ( ptr[96 + i] != 2 * i + 1 )
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goto fail;
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for ( ; i < 32; ++i )
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if ( ptr[96 + i] != 2 * i )
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goto fail;
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printf("okay\n");
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printf("%-40s", "Testing vpexpandb 32*1(%edx),%zmm3{%k2}{z}...");
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asm volatile ( "vpternlogd $0x81, %%zmm3, %%zmm3, %%zmm3\n"
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put_insn(vpexpandb,
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"vpexpandb 32*1(%0), %%zmm3%{%%k2%}%{z%}")
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:: "d" (NULL) );
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set_insn(vpexpandb);
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regs.edx = (unsigned long)(ptr + 64);
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rc = x86_emulate(&ctxt, &emulops);
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if ( rc != X86EMUL_OKAY || !check_eip(vpexpandb) )
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goto fail;
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asm ( "vmovdqu8 %%zmm1, %%zmm2%{%%k2%}%{z%}\n\t"
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"vpcmpeqb %%zmm2, %%zmm3, %%k0\n\t"
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"kmovq %%k0, %0"
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: "=m" (w) );
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if ( w != 0xffffffffffffffffULL )
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goto fail;
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printf("okay\n");
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printf("%-40s", "Testing vpcompressw %zmm4,48*2(%edx){%k3}...");
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asm volatile ( "kmovd %1, %%k3\n\t"
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"vmovdqu16 %2, %%zmm4\n"
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put_insn(vpcompressw,
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"vpcompressw %%zmm4, 48*2(%0)%{%%k3%}")
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:: "d" (NULL), "r" (0x5555aaaa), "m" (wsrc) );
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memset(ptr, 0xdb, 64 * 2);
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set_insn(vpcompressw);
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regs.edx = (unsigned long)ptr;
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rc = x86_emulate(&ctxt, &emulops);
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if ( rc != X86EMUL_OKAY || !check_eip(vpcompressw) ||
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memcmp(ptr, ptr + 32, 32 * 2) )
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goto fail;
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for ( i = 0; i < 8; ++i )
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{
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if ( ptr[(48 + i) * 2] != 2 * i + 1 ||
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ptr[(48 + i) * 2 + 1] )
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goto fail;
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}
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for ( ; i < 16; ++i )
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{
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if ( ptr[(48 + i) * 2] != 2 * i ||
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ptr[(48 + i) * 2 + 1] )
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goto fail;
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}
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printf("okay\n");
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printf("%-40s", "Testing vpexpandw 16*2(%ecx),%zmm5{%k3}{z}...");
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asm volatile ( "vpternlogd $0x81, %%zmm5, %%zmm5, %%zmm5\n"
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put_insn(vpexpandw,
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"vpexpandw 16*2(%0), %%zmm5%{%%k3%}%{z%}")
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:: "c" (NULL) );
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set_insn(vpexpandw);
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regs.ecx = (unsigned long)(ptr + 64);
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rc = x86_emulate(&ctxt, &emulops);
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if ( rc != X86EMUL_OKAY || !check_eip(vpexpandw) )
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goto fail;
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asm ( "vmovdqu16 %%zmm4, %%zmm6%{%%k3%}%{z%}\n\t"
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"vpcmpeqw %%zmm5, %%zmm6, %%k0\n\t"
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"kmovq %%k0, %0"
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: "=m" (w) );
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if ( w != 0xffffffff )
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goto fail;
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printf("okay\n");
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}
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#endif
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#undef decl_insn
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#undef put_insn
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#undef set_insn
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@@ -59,6 +59,9 @@
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(type *)((char *)mptr__ - offsetof(type, member)); \
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})
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#define hweight32 __builtin_popcount
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#define hweight64 __builtin_popcountll
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#define is_canonical_address(x) (((int64_t)(x) >> 47) == ((int64_t)(x) >> 63))
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extern uint32_t mxcsr_mask;
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@@ -138,6 +141,7 @@ static inline bool xcr0_mask(uint64_t mask)
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#define cpu_has_avx512bw (cp.feat.avx512bw && xcr0_mask(0xe6))
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#define cpu_has_avx512vl (cp.feat.avx512vl && xcr0_mask(0xe6))
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#define cpu_has_avx512_vbmi (cp.feat.avx512_vbmi && xcr0_mask(0xe6))
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#define cpu_has_avx512_vbmi2 (cp.feat.avx512_vbmi2 && xcr0_mask(0xe6))
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#define cpu_has_xgetbv1 (cpu_has_xsave && cp.xstate.xgetbv1)
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@@ -482,6 +482,8 @@ static const struct ext0f38_table {
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[0x59] = { .simd_size = simd_other, .two_op = 1, .d8s = 3 },
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[0x5a] = { .simd_size = simd_128, .two_op = 1, .d8s = 4 },
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[0x5b] = { .simd_size = simd_256, .two_op = 1, .d8s = d8s_vl_by_2 },
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[0x62] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_bw },
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[0x63] = { .simd_size = simd_packed_int, .to_mem = 1, .two_op = 1, .d8s = d8s_bw },
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[0x75 ... 0x76] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
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[0x77] = { .simd_size = simd_packed_fp, .d8s = d8s_vl },
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[0x78] = { .simd_size = simd_other, .two_op = 1 },
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@@ -489,6 +491,10 @@ static const struct ext0f38_table {
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[0x7a ... 0x7c] = { .simd_size = simd_none, .two_op = 1 },
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[0x7d ... 0x7e] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
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[0x7f] = { .simd_size = simd_packed_fp, .d8s = d8s_vl },
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[0x88] = { .simd_size = simd_packed_fp, .two_op = 1, .d8s = d8s_dq },
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[0x89] = { .simd_size = simd_packed_int, .two_op = 1, .d8s = d8s_dq },
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[0x8a] = { .simd_size = simd_packed_fp, .to_mem = 1, .two_op = 1, .d8s = d8s_dq },
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[0x8b] = { .simd_size = simd_packed_int, .to_mem = 1, .two_op = 1, .d8s = d8s_dq },
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[0x8c] = { .simd_size = simd_packed_int },
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[0x8d] = { .simd_size = simd_packed_int, .d8s = d8s_vl },
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[0x8e] = { .simd_size = simd_packed_int, .to_mem = 1 },
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@@ -1868,6 +1874,7 @@ in_protmode(
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#define vcpu_has_avx512bw() (ctxt->cpuid->feat.avx512bw)
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#define vcpu_has_avx512vl() (ctxt->cpuid->feat.avx512vl)
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#define vcpu_has_avx512_vbmi() (ctxt->cpuid->feat.avx512_vbmi)
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#define vcpu_has_avx512_vbmi2() (ctxt->cpuid->feat.avx512_vbmi2)
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#define vcpu_has_rdpid() (ctxt->cpuid->feat.rdpid)
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#define vcpu_must_have(feat) \
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@@ -8881,6 +8888,36 @@ x86_emulate(
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generate_exception_if(ea.type != OP_MEM || !vex.l || vex.w, EXC_UD);
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goto simd_0f_avx2;
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case X86EMUL_OPC_EVEX_66(0x0f38, 0x62): /* vpexpand{b,w} [xyz]mm/mem,[xyz]mm{k} */
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||||
case X86EMUL_OPC_EVEX_66(0x0f38, 0x63): /* vpcompress{b,w} [xyz]mm,[xyz]mm/mem{k} */
|
||||
host_and_vcpu_must_have(avx512_vbmi2);
|
||||
elem_bytes = 1 << evex.w;
|
||||
/* fall through */
|
||||
case X86EMUL_OPC_EVEX_66(0x0f38, 0x88): /* vexpandp{s,d} [xyz]mm/mem,[xyz]mm{k} */
|
||||
case X86EMUL_OPC_EVEX_66(0x0f38, 0x89): /* vpexpand{d,q} [xyz]mm/mem,[xyz]mm{k} */
|
||||
case X86EMUL_OPC_EVEX_66(0x0f38, 0x8a): /* vcompressp{s,d} [xyz]mm,[xyz]mm/mem{k} */
|
||||
case X86EMUL_OPC_EVEX_66(0x0f38, 0x8b): /* vpcompress{d,q} [xyz]mm,[xyz]mm/mem{k} */
|
||||
host_and_vcpu_must_have(avx512f);
|
||||
generate_exception_if(evex.brs, EXC_UD);
|
||||
avx512_vlen_check(false);
|
||||
/*
|
||||
* For the respective code below the main switch() to work we need to
|
||||
* compact op_mask here: Memory accesses are non-sparse even if the
|
||||
* mask register has sparsely set bits.
|
||||
*/
|
||||
if ( likely(fault_suppression) )
|
||||
{
|
||||
n = 1 << ((b & 8 ? 2 : 4) + evex.lr - evex.w);
|
||||
EXPECT(elem_bytes > 0);
|
||||
ASSERT(op_bytes == n * elem_bytes);
|
||||
op_mask &= ~0ULL >> (64 - n);
|
||||
n = hweight64(op_mask);
|
||||
op_bytes = n * elem_bytes;
|
||||
if ( n )
|
||||
op_mask = ~0ULL >> (64 - n);
|
||||
}
|
||||
goto simd_zmm;
|
||||
|
||||
case X86EMUL_OPC_EVEX_66(0x0f38, 0x75): /* vpermi2{b,w} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */
|
||||
case X86EMUL_OPC_EVEX_66(0x0f38, 0x7d): /* vpermt2{b,w} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */
|
||||
case X86EMUL_OPC_EVEX_66(0x0f38, 0x8d): /* vperm{b,w} [xyz]mm/mem,[xyz]mm,[xyz]mm{k} */
|
||||
|
||||
@@ -108,6 +108,7 @@
|
||||
|
||||
/* CPUID level 0x00000007:0.ecx */
|
||||
#define cpu_has_avx512_vbmi boot_cpu_has(X86_FEATURE_AVX512_VBMI)
|
||||
#define cpu_has_avx512_vbmi2 boot_cpu_has(X86_FEATURE_AVX512_VBMI2)
|
||||
#define cpu_has_rdpid boot_cpu_has(X86_FEATURE_RDPID)
|
||||
|
||||
/* CPUID level 0x80000007.edx */
|
||||
|
||||
@@ -228,6 +228,7 @@ XEN_CPUFEATURE(AVX512_VBMI, 6*32+ 1) /*A AVX-512 Vector Byte Manipulation Ins
|
||||
XEN_CPUFEATURE(UMIP, 6*32+ 2) /*S User Mode Instruction Prevention */
|
||||
XEN_CPUFEATURE(PKU, 6*32+ 3) /*H Protection Keys for Userspace */
|
||||
XEN_CPUFEATURE(OSPKE, 6*32+ 4) /*! OS Protection Keys Enable */
|
||||
XEN_CPUFEATURE(AVX512_VBMI2, 6*32+ 6) /*A Additional AVX-512 Vector Byte Manipulation Instrs */
|
||||
XEN_CPUFEATURE(AVX512_VPOPCNTDQ, 6*32+14) /*A POPCNT for vectors of DW/QW */
|
||||
XEN_CPUFEATURE(RDPID, 6*32+22) /*A RDPID instruction */
|
||||
|
||||
|
||||
@@ -265,10 +265,10 @@ def crunch_numbers(state):
|
||||
AVX512BW, AVX512VL, AVX512_4VNNIW, AVX512_4FMAPS,
|
||||
AVX512_VPOPCNTDQ],
|
||||
|
||||
# AVX512 extensions acting solely on vectors of bytes/words are made
|
||||
# AVX512 extensions acting on vectors of bytes/words are made
|
||||
# dependents of AVX512BW (as to requiring wider than 16-bit mask
|
||||
# registers), despite the SDM not formally making this connection.
|
||||
AVX512BW: [AVX512_BF16, AVX512_VBMI],
|
||||
AVX512BW: [AVX512_BF16, AVX512_VBMI, AVX512_VBMI2],
|
||||
|
||||
# The features:
|
||||
# * Single Thread Indirect Branch Predictors
|
||||
|
||||