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x86/pv: Options to disable and/or compile out 32bit PV support
This is the start of some performance and security-hardening improvements, based on the fact that 32bit PV guests are few and far between these days. Ring1 is full of architectural corner cases, such as counting as supervisor from a paging point of view. This accounts for a substantial performance hit on processors from the last 8 years (adjusting SMEP/SMAP on every privilege transition), and the gap is only going to get bigger with new hardware features. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Wei Liu <wl@xen.org> Reviewed-by: Roger Pau Monné <roger.pau@citrix.com> Acked-by: Jan Beulich <jbeulich@suse.com>
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@@ -1694,7 +1694,17 @@ The following resources are available:
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CDP, one COS will corespond two CBMs other than one with CAT, due to the
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sum of CBMs is fixed, that means actual `cos_max` in use will automatically
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reduce to half when CDP is enabled.
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### pv
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= List of [ 32=<bool> ]
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Applicability: x86
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Controls for aspects of PV guest support.
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* The `32` boolean controls whether 32bit PV guests can be created. It
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defaults to `true`, and is ignored when `CONFIG_PV32` is compiled out.
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### pv-linear-pt (x86)
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> `= <boolean>`
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@@ -49,6 +49,22 @@ config PV
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If unsure, say Y.
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config PV32
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bool "Support for 32bit PV guests"
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depends on PV
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default y
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---help---
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The 32bit PV ABI uses Ring1, an area of the x86 architecture which
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was deprecated and mostly removed in the AMD64 spec. As a result,
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it occasionally conflicts with newer x86 hardware features, causing
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overheads for Xen to maintain backwards compatibility.
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People may wish to disable 32bit PV guests for attack surface
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reduction, or performance reasons. Backwards compatibility can be
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provided via the PV Shim mechanism.
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If unsure, say Y.
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config PV_LINEAR_PT
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bool "Support for PV linear pagetables"
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depends on PV
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@@ -16,6 +16,38 @@
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#include <asm/pv/domain.h>
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#include <asm/shadow.h>
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#ifdef CONFIG_PV32
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int8_t __read_mostly opt_pv32 = -1;
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#endif
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static __init int parse_pv(const char *s)
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{
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const char *ss;
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int val, rc = 0;
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do {
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ss = strchr(s, ',');
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if ( !ss )
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ss = strchr(s, '\0');
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if ( (val = parse_boolean("32", s, ss)) >= 0 )
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{
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#ifdef CONFIG_PV32
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opt_pv32 = val;
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#else
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no_config_param("PV32", "pv", s, ss);
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#endif
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}
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else
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rc = -EINVAL;
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s = ss + 1;
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} while ( *ss );
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return rc;
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}
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custom_param("pv", parse_pv);
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static __read_mostly enum {
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PCID_OFF,
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PCID_ALL,
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@@ -174,6 +206,8 @@ int switch_compat(struct domain *d)
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BUILD_BUG_ON(offsetof(struct shared_info, vcpu_info) != 0);
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if ( !opt_pv32 )
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return -EOPNOTSUPP;
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if ( is_hvm_domain(d) || domain_tot_pages(d) != 0 )
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return -EACCES;
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if ( is_pv_32bit_domain(d) )
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@@ -53,6 +53,7 @@
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#include <asm/spec_ctrl.h>
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#include <asm/guest.h>
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#include <asm/microcode.h>
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#include <asm/pv/domain.h>
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/* opt_nosmp: If true, secondary processors are ignored. */
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static bool __initdata opt_nosmp;
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@@ -1870,8 +1871,12 @@ void arch_get_xen_caps(xen_capabilities_info_t *info)
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{
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snprintf(s, sizeof(s), "xen-%d.%d-x86_64 ", major, minor);
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safe_strcat(*info, s);
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snprintf(s, sizeof(s), "xen-%d.%d-x86_32p ", major, minor);
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safe_strcat(*info, s);
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if ( opt_pv32 )
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{
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snprintf(s, sizeof(s), "xen-%d.%d-x86_32p ", major, minor);
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safe_strcat(*info, s);
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}
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}
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if ( hvm_enabled )
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{
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@@ -23,6 +23,12 @@
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#include <xen/sched.h>
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#ifdef CONFIG_PV32
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extern int8_t opt_pv32;
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#else
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# define opt_pv32 false
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#endif
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/*
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* PCID values for the address spaces of 64-bit pv domains:
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*
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@@ -127,4 +127,13 @@ extern const struct kernel_param __param_start[], __param_end[];
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string_param(_name, _var); \
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string_runtime_only_param(_name, _var)
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static inline void no_config_param(const char *cfg, const char *param,
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const char *s, const char *e)
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{
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int len = e ? ({ ASSERT(e >= s); e - s; }) : strlen(s);
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printk(XENLOG_INFO "CONFIG_%s disabled - ignoring '%s=%*s' setting\n",
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cfg, param, len, s);
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}
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#endif /* _XEN_PARAM_H */
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