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x86/MSI-X: use qword MMIO access for address writes
Now that we support it for our guests, let's do so ourselves too. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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3 files changed
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@@ -198,8 +198,7 @@ static void read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
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void __iomem *base;
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base = entry->mask_base;
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msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
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msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
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msg->address = readq(base + PCI_MSIX_ENTRY_ADDRESS_OFFSET);
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msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
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break;
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}
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@@ -260,10 +259,7 @@ static int write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
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void __iomem *base;
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base = entry->mask_base;
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writel(msg->address_lo,
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base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
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writel(msg->address_hi,
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base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
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writeq(msg->address, base + PCI_MSIX_ENTRY_ADDRESS_OFFSET);
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writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
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break;
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}
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@@ -65,8 +65,13 @@ struct msi_info {
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};
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struct msi_msg {
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u32 address_lo; /* low 32 bits of msi message address */
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u32 address_hi; /* high 32 bits of msi message address */
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union {
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u64 address; /* message address */
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struct {
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u32 address_lo; /* message address low 32 bits */
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u32 address_hi; /* message address high 32 bits */
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};
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};
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u32 data; /* 16 bits of msi message data */
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u32 dest32; /* used when Interrupt Remapping with EIM is enabled */
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};
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@@ -307,6 +307,7 @@
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#define PCI_MSIX_BIRMASK (7 << 0)
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#define PCI_MSIX_ENTRY_SIZE 16
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#define PCI_MSIX_ENTRY_ADDRESS_OFFSET 0
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#define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0
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#define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4
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#define PCI_MSIX_ENTRY_DATA_OFFSET 8
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