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ocaml: Add XC bindings.
This include a small and simpler reimplementation of libxc. Signed-off-by: Vincent Hanquez <vincent.hanquez@eu.citrix.com>
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Keir Fraser committed
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@@ -0,0 +1,4 @@
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version = "@VERSION@"
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description = "Xen Control Interface"
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archive(byte) = "xc.cma"
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archive(native) = "xc.cmxa"
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@@ -0,0 +1,28 @@
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TOPLEVEL=../..
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include $(TOPLEVEL)/common.make
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CFLAGS += -I../mmap -I./
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OCAMLINCLUDE += -I ../mmap -I ../uuid
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OBJS = xc
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INTF = xc.cmi
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LIBS = xc.cma xc.cmxa
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xc_OBJS = $(OBJS)
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xc_C_OBJS = xc_lib xc_stubs
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OCAML_LIBRARY = xc
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all: $(INTF) $(LIBS)
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libs: $(LIBS)
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.PHONY: install
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install: $(LIBS) META
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ocamlfind install -destdir $(DESTDIR)$(shell ocamlfind printconf destdir) -ldconf ignore xc META $(INTF) $(LIBS) *.a *.so *.cmx
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.PHONY: uninstall
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uninstall:
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ocamlfind remove xc
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include $(TOPLEVEL)/Makefile.rules
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@@ -0,0 +1,191 @@
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/*
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* Copyright (C) 2006-2007 XenSource Ltd.
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* Copyright (C) 2008 Citrix Ltd.
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* Author Vincent Hanquez <vincent.hanquez@eu.citrix.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation; version 2.1 only. with the special
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* exception on linking described in file LICENSE.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*/
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#define __XEN_TOOLS__
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#include <xen/xen.h>
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#include <xen/memory.h>
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#include <xen/sysctl.h>
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#include <xen/domctl.h>
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#include <xen/sched.h>
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#include <xen/sysctl.h>
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#if XEN_SYSCTL_INTERFACE_VERSION < 4
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#include <xen/linux/privcmd.h>
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#else
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#include <xen/sys/privcmd.h>
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#endif
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#include <xen/version.h>
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#include <xen/foreign/x86_32.h>
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#include <xen/foreign/x86_64.h>
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#include <xen/hvm/params.h>
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#include "xc_e820.h"
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typedef xen_domctl_getdomaininfo_t xc_domaininfo_t;
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typedef xen_domctl_getvcpuinfo_t xc_vcpuinfo_t;
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typedef xen_sysctl_physinfo_t xc_physinfo_t;
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struct xc_core_header {
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unsigned int xch_magic;
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unsigned int xch_nr_vcpus;
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unsigned int xch_nr_pages;
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unsigned int xch_ctxt_offset;
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unsigned int xch_index_offset;
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unsigned int xch_pages_offset;
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};
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typedef union {
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#if defined(__i386__) || defined(__x86_64__)
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vcpu_guest_context_x86_64_t x64;
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vcpu_guest_context_x86_32_t x32;
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#endif
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vcpu_guest_context_t c;
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} vcpu_guest_context_any_t;
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char * xc_error_get(void);
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void xc_error_clear(void);
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int xc_using_injection(void);
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int xc_interface_open(void);
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int xc_interface_close(int handle);
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int xc_domain_create(int handle, unsigned int ssidref,
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xen_domain_handle_t dhandle,
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unsigned int flags, unsigned int *pdomid);
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int xc_domain_pause(int handle, unsigned int domid);
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int xc_domain_unpause(int handle, unsigned int domid);
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int xc_domain_resume_fast(int handle, unsigned int domid);
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int xc_domain_destroy(int handle, unsigned int domid);
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int xc_domain_shutdown(int handle, int domid, int reason);
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int xc_vcpu_setaffinity(int handle, unsigned int domid, int vcpu,
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uint64_t cpumap);
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int xc_vcpu_getaffinity(int handle, unsigned int domid, int vcpu,
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uint64_t *cpumap);
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int xc_domain_getinfolist(int handle, unsigned int first_domain,
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unsigned int max_domains, xc_domaininfo_t *info);
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int xc_domain_getinfo(int handle, unsigned int first_domain,
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xc_domaininfo_t *info);
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int xc_domain_setmaxmem(int handle, unsigned int domid, unsigned int max_memkb);
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int xc_domain_set_memmap_limit(int handle, unsigned int domid,
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unsigned long map_limitkb);
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int xc_domain_set_time_offset(int handle, unsigned int domid, int time_offset);
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int xc_domain_memory_increase_reservation(int handle, unsigned int domid,
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unsigned long nr_extents,
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unsigned int extent_order,
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unsigned int address_bits,
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xen_pfn_t *extent_start);
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int xc_domain_memory_decrease_reservation(int handle, unsigned int domid,
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unsigned long nr_extents,
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unsigned int extent_order,
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unsigned int address_bits,
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xen_pfn_t *extent_start);
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int xc_domain_memory_populate_physmap(int handle, unsigned int domid,
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unsigned long nr_extents,
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unsigned int extent_order,
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unsigned int address_bits,
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xen_pfn_t *extent_start);
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int xc_domain_setvmxassist(int handle, unsigned int domid, int use_vmxassist);
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int xc_domain_max_vcpus(int handle, unsigned int domid, unsigned int max);
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int xc_domain_sethandle(int handle, unsigned int domid,
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xen_domain_handle_t dhandle);
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int xc_vcpu_getinfo(int handle, unsigned int domid, unsigned int vcpu,
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xc_vcpuinfo_t *info);
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int xc_domain_ioport_permission(int handle, unsigned int domid,
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unsigned int first_port, unsigned int nr_ports,
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unsigned int allow_access);
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int xc_vcpu_setcontext(int handle, unsigned int domid,
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unsigned int vcpu, vcpu_guest_context_any_t *ctxt);
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int xc_vcpu_getcontext(int handle, unsigned int domid,
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unsigned int vcpu, vcpu_guest_context_any_t *ctxt);
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int xc_domain_irq_permission(int handle, unsigned int domid,
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unsigned char pirq, unsigned char allow_access);
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int xc_domain_iomem_permission(int handle, unsigned int domid,
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unsigned long first_mfn, unsigned long nr_mfns,
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unsigned char allow_access);
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long long xc_domain_get_cpu_usage(int handle, unsigned int domid,
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unsigned int vcpu);
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void *xc_map_foreign_range(int handle, unsigned int domid,
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int size, int prot, unsigned long mfn);
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int xc_map_foreign_ranges(int handle, unsigned int domid,
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privcmd_mmap_entry_t *entries, int nr);
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int xc_readconsolering(int handle, char **pbuffer,
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unsigned int *pnr_chars, int clear);
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int xc_send_debug_keys(int handle, char *keys);
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int xc_physinfo(int handle, xc_physinfo_t *put_info);
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int xc_pcpu_info(int handle, int max_cpus, uint64_t *info, int *nr_cpus);
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int xc_sched_id(int handle, int *sched_id);
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int xc_version(int handle, int cmd, void *arg);
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int xc_evtchn_alloc_unbound(int handle, unsigned int domid,
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unsigned int remote_domid);
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int xc_evtchn_reset(int handle, unsigned int domid);
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int xc_sched_credit_domain_set(int handle, unsigned int domid,
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struct xen_domctl_sched_credit *sdom);
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int xc_sched_credit_domain_get(int handle, unsigned int domid,
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struct xen_domctl_sched_credit *sdom);
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int xc_shadow_allocation_get(int handle, unsigned int domid,
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uint32_t *mb);
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int xc_shadow_allocation_set(int handle, unsigned int domid,
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uint32_t mb);
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int xc_domain_get_pfn_list(int handle, unsigned int domid,
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xen_pfn_t *pfn_array, unsigned long max_pfns);
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int xc_hvm_check_pvdriver(int handle, unsigned int domid);
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int xc_domain_assign_device(int handle, unsigned int domid,
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int domain, int bus, int slot, int func);
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int xc_domain_deassign_device(int handle, unsigned int domid,
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int domain, int bus, int slot, int func);
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int xc_domain_test_assign_device(int handle, unsigned int domid,
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int domain, int bus, int slot, int func);
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int xc_domain_watchdog(int handle, int id, uint32_t timeout);
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int xc_domain_set_machine_address_size(int xc, uint32_t domid, unsigned int width);
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int xc_domain_get_machine_address_size(int xc, uint32_t domid);
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int xc_domain_cpuid_set(int xc, unsigned int domid, int hvm,
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uint32_t input, uint32_t oinput,
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char *config[4], char *config_out[4]);
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int xc_domain_cpuid_apply(int xc, unsigned int domid, int hvm);
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int xc_cpuid_check(uint32_t input, uint32_t optsubinput,
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char *config[4], char *config_out[4]);
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int xc_domain_send_s3resume(int handle, unsigned int domid);
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int xc_domain_set_vpt_align(int handle, unsigned int domid, int vpt_align);
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int xc_domain_set_hpet(int handle, unsigned int domid, int hpet);
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int xc_domain_set_timer_mode(int handle, unsigned int domid, int mode);
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int xc_domain_get_acpi_s_state(int handle, unsigned int domid);
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#if XEN_SYSCTL_INTERFACE_VERSION >= 6
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#define SAFEDIV(a, b) (((b) > 0) ? (a) / (b) : (a))
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#define COMPAT_FIELD_physinfo_get_nr_cpus(p) (p).nr_cpus
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#define COMPAT_FIELD_physinfo_get_sockets_per_node(p) \
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SAFEDIV((p).nr_cpus, ((p).threads_per_core * (p).cores_per_socket * (p).nr_nodes))
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#else
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#define COMPAT_FIELD_physinfo_get_nr_cpus(p) \
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((p).threads_per_core * (p).sockets_per_node * \
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(p).cores_per_socket * (p).threads_per_core)
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#define COMPAT_FIELD_physinfo_get_sockets_per_node(p) (p).sockets_per_node
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#endif
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#if __XEN_LATEST_INTERFACE_VERSION__ >= 0x00030209
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#define COMPAT_FIELD_ADDRESS_BITS mem_flags
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#else
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#define COMPAT_FIELD_ADDRESS_BITS address_bits
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#endif
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@@ -0,0 +1,340 @@
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(*
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* Copyright (C) 2006-2007 XenSource Ltd.
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* Copyright (C) 2008 Citrix Ltd.
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* Author Vincent Hanquez <vincent.hanquez@eu.citrix.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation; version 2.1 only. with the special
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* exception on linking described in file LICENSE.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*)
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(** *)
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type domid = int
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(* ** xenctrl.h ** *)
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type vcpuinfo =
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{
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online: bool;
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blocked: bool;
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running: bool;
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cputime: int64;
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cpumap: int32;
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}
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type domaininfo =
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{
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domid : domid;
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dying : bool;
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shutdown : bool;
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paused : bool;
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blocked : bool;
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running : bool;
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hvm_guest : bool;
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shutdown_code : int;
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total_memory_pages: nativeint;
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max_memory_pages : nativeint;
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shared_info_frame : int64;
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cpu_time : int64;
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nr_online_vcpus : int;
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max_vcpu_id : int;
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ssidref : int32;
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handle : int array;
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}
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type sched_control =
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{
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weight : int;
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cap : int;
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}
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type physinfo_cap_flag =
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| CAP_HVM
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| CAP_DirectIO
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type physinfo =
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{
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threads_per_core : int;
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cores_per_socket : int;
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nr_cpus : int;
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max_node_id : int;
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cpu_khz : int;
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total_pages : nativeint;
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free_pages : nativeint;
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scrub_pages : nativeint;
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(* XXX hw_cap *)
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capabilities : physinfo_cap_flag list;
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}
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type version =
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{
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major : int;
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minor : int;
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extra : string;
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}
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type compile_info =
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{
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compiler : string;
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compile_by : string;
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compile_domain : string;
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compile_date : string;
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}
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type shutdown_reason = Poweroff | Reboot | Suspend | Crash | Halt
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type domain_create_flag = CDF_HVM | CDF_HAP
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exception Error of string
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type handle
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(* this is only use by coredumping *)
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external sizeof_core_header: unit -> int
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= "stub_sizeof_core_header"
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external sizeof_vcpu_guest_context: unit -> int
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= "stub_sizeof_vcpu_guest_context"
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external sizeof_xen_pfn: unit -> int = "stub_sizeof_xen_pfn"
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(* end of use *)
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external interface_open: unit -> handle = "stub_xc_interface_open"
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external interface_close: handle -> unit = "stub_xc_interface_close"
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external using_injection: unit -> bool = "stub_xc_using_injection"
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let with_intf f =
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let xc = interface_open () in
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let r = try f xc with exn -> interface_close xc; raise exn in
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interface_close xc;
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r
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external _domain_create: handle -> int32 -> domain_create_flag list -> int array -> domid
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= "stub_xc_domain_create"
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let domain_create handle n flags uuid =
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_domain_create handle n flags (Uuid.int_array_of_uuid uuid)
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external _domain_sethandle: handle -> domid -> int array -> unit
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= "stub_xc_domain_sethandle"
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let domain_sethandle handle n uuid =
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_domain_sethandle handle n (Uuid.int_array_of_uuid uuid)
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external domain_setvmxassist: handle -> domid -> bool -> unit
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= "stub_xc_domain_setvmxassist"
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external domain_max_vcpus: handle -> domid -> int -> unit
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= "stub_xc_domain_max_vcpus"
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external domain_pause: handle -> domid -> unit = "stub_xc_domain_pause"
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external domain_unpause: handle -> domid -> unit = "stub_xc_domain_unpause"
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external domain_resume_fast: handle -> domid -> unit = "stub_xc_domain_resume_fast"
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external domain_destroy: handle -> domid -> unit = "stub_xc_domain_destroy"
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external domain_shutdown: handle -> domid -> shutdown_reason -> unit
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= "stub_xc_domain_shutdown"
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external _domain_getinfolist: handle -> domid -> int -> domaininfo list
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= "stub_xc_domain_getinfolist"
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let domain_getinfolist handle first_domain =
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let nb = 2 in
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let last_domid l = (List.hd l).domid + 1 in
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let rec __getlist from =
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let l = _domain_getinfolist handle from nb in
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(if List.length l = nb then __getlist (last_domid l) else []) @ l
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in
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List.rev (__getlist first_domain)
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external domain_getinfo: handle -> domid -> domaininfo= "stub_xc_domain_getinfo"
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external domain_get_vcpuinfo: handle -> int -> int -> vcpuinfo
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= "stub_xc_vcpu_getinfo"
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external domain_ioport_permission: handle -> domid -> int -> int -> bool -> unit
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= "stub_xc_domain_ioport_permission"
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external domain_iomem_permission: handle -> domid -> nativeint -> nativeint -> bool -> unit
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= "stub_xc_domain_iomem_permission"
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external domain_irq_permission: handle -> domid -> int -> bool -> unit
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= "stub_xc_domain_irq_permission"
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external vcpu_affinity_set: handle -> domid -> int -> int64 -> unit
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= "stub_xc_vcpu_setaffinity"
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external vcpu_affinity_get: handle -> domid -> int -> int64
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= "stub_xc_vcpu_getaffinity"
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external vcpu_context_get: handle -> domid -> int -> string
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= "stub_xc_vcpu_context_get"
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external sched_id: handle -> int = "stub_xc_sched_id"
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||||
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external sched_credit_domain_set: handle -> domid -> sched_control -> unit
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= "stub_sched_credit_domain_set"
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external sched_credit_domain_get: handle -> domid -> sched_control
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= "stub_sched_credit_domain_get"
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||||
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external shadow_allocation_set: handle -> domid -> int -> unit
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= "stub_shadow_allocation_set"
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||||
external shadow_allocation_get: handle -> domid -> int
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= "stub_shadow_allocation_get"
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||||
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external evtchn_alloc_unbound: handle -> domid -> domid -> int
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= "stub_xc_evtchn_alloc_unbound"
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external evtchn_reset: handle -> domid -> unit = "stub_xc_evtchn_reset"
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||||
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||||
external readconsolering: handle -> string = "stub_xc_readconsolering"
|
||||
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||||
external send_debug_keys: handle -> string -> unit = "stub_xc_send_debug_keys"
|
||||
external physinfo: handle -> physinfo = "stub_xc_physinfo"
|
||||
external pcpu_info: handle -> int -> int64 array = "stub_xc_pcpu_info"
|
||||
|
||||
external domain_setmaxmem: handle -> domid -> int64 -> unit
|
||||
= "stub_xc_domain_setmaxmem"
|
||||
external domain_set_memmap_limit: handle -> domid -> int64 -> unit
|
||||
= "stub_xc_domain_set_memmap_limit"
|
||||
external domain_memory_increase_reservation: handle -> domid -> int64 -> unit
|
||||
= "stub_xc_domain_memory_increase_reservation"
|
||||
|
||||
external domain_set_machine_address_size: handle -> domid -> int -> unit
|
||||
= "stub_xc_domain_set_machine_address_size"
|
||||
external domain_get_machine_address_size: handle -> domid -> int
|
||||
= "stub_xc_domain_get_machine_address_size"
|
||||
|
||||
external domain_cpuid_set: handle -> domid -> bool -> (int64 * (int64 option))
|
||||
-> string option array
|
||||
-> string option array
|
||||
= "stub_xc_domain_cpuid_set"
|
||||
external domain_cpuid_apply: handle -> domid -> bool -> unit
|
||||
= "stub_xc_domain_cpuid_apply"
|
||||
external cpuid_check: (int64 * (int64 option)) -> string option array -> (bool * string option array)
|
||||
= "stub_xc_cpuid_check"
|
||||
|
||||
external map_foreign_range: handle -> domid -> int
|
||||
-> nativeint -> Mmap.mmap_interface
|
||||
= "stub_map_foreign_range"
|
||||
|
||||
external domain_get_pfn_list: handle -> domid -> nativeint -> nativeint array
|
||||
= "stub_xc_domain_get_pfn_list"
|
||||
|
||||
external domain_assign_device: handle -> domid -> (int * int * int * int) -> unit
|
||||
= "stub_xc_domain_assign_device"
|
||||
external domain_deassign_device: handle -> domid -> (int * int * int * int) -> unit
|
||||
= "stub_xc_domain_deassign_device"
|
||||
external domain_test_assign_device: handle -> domid -> (int * int * int * int) -> bool
|
||||
= "stub_xc_domain_test_assign_device"
|
||||
|
||||
external domain_set_timer_mode: handle -> domid -> int -> unit = "stub_xc_domain_set_timer_mode"
|
||||
external domain_set_hpet: handle -> domid -> int -> unit = "stub_xc_domain_set_hpet"
|
||||
external domain_set_vpt_align: handle -> domid -> int -> unit = "stub_xc_domain_set_vpt_align"
|
||||
|
||||
external domain_send_s3resume: handle -> domid -> unit = "stub_xc_domain_send_s3resume"
|
||||
external domain_get_acpi_s_state: handle -> domid -> int = "stub_xc_domain_get_acpi_s_state"
|
||||
|
||||
(** check if some hvm domain got pv driver or not *)
|
||||
external hvm_check_pvdriver: handle -> domid -> bool
|
||||
= "stub_xc_hvm_check_pvdriver"
|
||||
|
||||
external version: handle -> version = "stub_xc_version_version"
|
||||
external version_compile_info: handle -> compile_info
|
||||
= "stub_xc_version_compile_info"
|
||||
external version_changeset: handle -> string = "stub_xc_version_changeset"
|
||||
external version_capabilities: handle -> string =
|
||||
"stub_xc_version_capabilities"
|
||||
|
||||
external watchdog : handle -> int -> int32 -> int
|
||||
= "stub_xc_watchdog"
|
||||
|
||||
(* core dump structure *)
|
||||
type core_magic = Magic_hvm | Magic_pv
|
||||
|
||||
type core_header = {
|
||||
xch_magic: core_magic;
|
||||
xch_nr_vcpus: int;
|
||||
xch_nr_pages: nativeint;
|
||||
xch_index_offset: int64;
|
||||
xch_ctxt_offset: int64;
|
||||
xch_pages_offset: int64;
|
||||
}
|
||||
|
||||
external marshall_core_header: core_header -> string = "stub_marshall_core_header"
|
||||
|
||||
(* coredump *)
|
||||
let coredump xch domid fd =
|
||||
let dump s =
|
||||
let wd = Unix.write fd s 0 (String.length s) in
|
||||
if wd <> String.length s then
|
||||
failwith "error while writing";
|
||||
in
|
||||
|
||||
let info = domain_getinfo xch domid in
|
||||
|
||||
let nrpages = info.total_memory_pages in
|
||||
let ctxt = Array.make info.max_vcpu_id None in
|
||||
let nr_vcpus = ref 0 in
|
||||
for i = 0 to info.max_vcpu_id - 1
|
||||
do
|
||||
ctxt.(i) <- try
|
||||
let v = vcpu_context_get xch domid i in
|
||||
incr nr_vcpus;
|
||||
Some v
|
||||
with _ -> None
|
||||
done;
|
||||
|
||||
(* FIXME page offset if not rounded to sup *)
|
||||
let page_offset =
|
||||
Int64.add
|
||||
(Int64.of_int (sizeof_core_header () +
|
||||
(sizeof_vcpu_guest_context () * !nr_vcpus)))
|
||||
(Int64.of_nativeint (
|
||||
Nativeint.mul
|
||||
(Nativeint.of_int (sizeof_xen_pfn ()))
|
||||
nrpages)
|
||||
)
|
||||
in
|
||||
|
||||
let header = {
|
||||
xch_magic = if info.hvm_guest then Magic_hvm else Magic_pv;
|
||||
xch_nr_vcpus = !nr_vcpus;
|
||||
xch_nr_pages = nrpages;
|
||||
xch_ctxt_offset = Int64.of_int (sizeof_core_header ());
|
||||
xch_index_offset = Int64.of_int (sizeof_core_header ()
|
||||
+ sizeof_vcpu_guest_context ());
|
||||
xch_pages_offset = page_offset;
|
||||
} in
|
||||
|
||||
dump (marshall_core_header header);
|
||||
for i = 0 to info.max_vcpu_id - 1
|
||||
do
|
||||
match ctxt.(i) with
|
||||
| None -> ()
|
||||
| Some ctxt_i -> dump ctxt_i
|
||||
done;
|
||||
let pfns = domain_get_pfn_list xch domid nrpages in
|
||||
if Array.length pfns <> Nativeint.to_int nrpages then
|
||||
failwith "could not get the page frame list";
|
||||
|
||||
let page_size = Mmap.getpagesize () in
|
||||
for i = 0 to Nativeint.to_int nrpages - 1
|
||||
do
|
||||
let page = map_foreign_range xch domid page_size pfns.(i) in
|
||||
let data = Mmap.read page 0 page_size in
|
||||
Mmap.unmap page;
|
||||
dump data
|
||||
done
|
||||
|
||||
(* ** Misc ** *)
|
||||
|
||||
(**
|
||||
Convert the given number of pages to an amount in KiB, rounded up.
|
||||
*)
|
||||
external pages_to_kib : int64 -> int64 = "stub_pages_to_kib"
|
||||
let pages_to_mib pages = Int64.div (pages_to_kib pages) 1024L
|
||||
|
||||
let _ = Callback.register_exception "xc.error" (Error "register_callback")
|
||||
@@ -0,0 +1,196 @@
|
||||
(*
|
||||
* Copyright (C) 2006-2007 XenSource Ltd.
|
||||
* Copyright (C) 2008 Citrix Ltd.
|
||||
* Author Vincent Hanquez <vincent.hanquez@eu.citrix.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published
|
||||
* by the Free Software Foundation; version 2.1 only. with the special
|
||||
* exception on linking described in file LICENSE.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*)
|
||||
|
||||
type domid = int
|
||||
type vcpuinfo = {
|
||||
online : bool;
|
||||
blocked : bool;
|
||||
running : bool;
|
||||
cputime : int64;
|
||||
cpumap : int32;
|
||||
}
|
||||
type domaininfo = {
|
||||
domid : domid;
|
||||
dying : bool;
|
||||
shutdown : bool;
|
||||
paused : bool;
|
||||
blocked : bool;
|
||||
running : bool;
|
||||
hvm_guest : bool;
|
||||
shutdown_code : int;
|
||||
total_memory_pages : nativeint;
|
||||
max_memory_pages : nativeint;
|
||||
shared_info_frame : int64;
|
||||
cpu_time : int64;
|
||||
nr_online_vcpus : int;
|
||||
max_vcpu_id : int;
|
||||
ssidref : int32;
|
||||
handle : int array;
|
||||
}
|
||||
type sched_control = { weight : int; cap : int; }
|
||||
type physinfo_cap_flag = CAP_HVM | CAP_DirectIO
|
||||
type physinfo = {
|
||||
threads_per_core : int;
|
||||
cores_per_socket : int;
|
||||
nr_cpus : int;
|
||||
max_node_id : int;
|
||||
cpu_khz : int;
|
||||
total_pages : nativeint;
|
||||
free_pages : nativeint;
|
||||
scrub_pages : nativeint;
|
||||
capabilities : physinfo_cap_flag list;
|
||||
}
|
||||
type version = { major : int; minor : int; extra : string; }
|
||||
type compile_info = {
|
||||
compiler : string;
|
||||
compile_by : string;
|
||||
compile_domain : string;
|
||||
compile_date : string;
|
||||
}
|
||||
type shutdown_reason = Poweroff | Reboot | Suspend | Crash | Halt
|
||||
|
||||
type domain_create_flag = CDF_HVM | CDF_HAP
|
||||
|
||||
exception Error of string
|
||||
type handle
|
||||
external sizeof_core_header : unit -> int = "stub_sizeof_core_header"
|
||||
external sizeof_vcpu_guest_context : unit -> int
|
||||
= "stub_sizeof_vcpu_guest_context"
|
||||
external sizeof_xen_pfn : unit -> int = "stub_sizeof_xen_pfn"
|
||||
external interface_open : unit -> handle = "stub_xc_interface_open"
|
||||
external using_injection : unit -> bool = "stub_xc_using_injection"
|
||||
external interface_close : handle -> unit = "stub_xc_interface_close"
|
||||
val with_intf : (handle -> 'a) -> 'a
|
||||
external _domain_create : handle -> int32 -> domain_create_flag list -> int array -> domid
|
||||
= "stub_xc_domain_create"
|
||||
val domain_create : handle -> int32 -> domain_create_flag list -> 'a Uuid.t -> domid
|
||||
external _domain_sethandle : handle -> domid -> int array -> unit
|
||||
= "stub_xc_domain_sethandle"
|
||||
val domain_sethandle : handle -> domid -> 'a Uuid.t -> unit
|
||||
external domain_setvmxassist: handle -> domid -> bool -> unit
|
||||
= "stub_xc_domain_setvmxassist"
|
||||
external domain_max_vcpus : handle -> domid -> int -> unit
|
||||
= "stub_xc_domain_max_vcpus"
|
||||
external domain_pause : handle -> domid -> unit = "stub_xc_domain_pause"
|
||||
external domain_unpause : handle -> domid -> unit = "stub_xc_domain_unpause"
|
||||
external domain_resume_fast : handle -> domid -> unit
|
||||
= "stub_xc_domain_resume_fast"
|
||||
external domain_destroy : handle -> domid -> unit = "stub_xc_domain_destroy"
|
||||
external domain_shutdown : handle -> domid -> shutdown_reason -> unit
|
||||
= "stub_xc_domain_shutdown"
|
||||
external _domain_getinfolist : handle -> domid -> int -> domaininfo list
|
||||
= "stub_xc_domain_getinfolist"
|
||||
val domain_getinfolist : handle -> domid -> domaininfo list
|
||||
external domain_getinfo : handle -> domid -> domaininfo
|
||||
= "stub_xc_domain_getinfo"
|
||||
external domain_get_vcpuinfo : handle -> int -> int -> vcpuinfo
|
||||
= "stub_xc_vcpu_getinfo"
|
||||
external domain_ioport_permission: handle -> domid -> int -> int -> bool -> unit
|
||||
= "stub_xc_domain_ioport_permission"
|
||||
external domain_iomem_permission: handle -> domid -> nativeint -> nativeint -> bool -> unit
|
||||
= "stub_xc_domain_iomem_permission"
|
||||
external domain_irq_permission: handle -> domid -> int -> bool -> unit
|
||||
= "stub_xc_domain_irq_permission"
|
||||
external vcpu_affinity_set : handle -> domid -> int -> int64 -> unit
|
||||
= "stub_xc_vcpu_setaffinity"
|
||||
external vcpu_affinity_get : handle -> domid -> int -> int64
|
||||
= "stub_xc_vcpu_getaffinity"
|
||||
external vcpu_context_get : handle -> domid -> int -> string
|
||||
= "stub_xc_vcpu_context_get"
|
||||
external sched_id : handle -> int = "stub_xc_sched_id"
|
||||
external sched_credit_domain_set : handle -> domid -> sched_control -> unit
|
||||
= "stub_sched_credit_domain_set"
|
||||
external sched_credit_domain_get : handle -> domid -> sched_control
|
||||
= "stub_sched_credit_domain_get"
|
||||
external shadow_allocation_set : handle -> domid -> int -> unit
|
||||
= "stub_shadow_allocation_set"
|
||||
external shadow_allocation_get : handle -> domid -> int
|
||||
= "stub_shadow_allocation_get"
|
||||
external evtchn_alloc_unbound : handle -> domid -> domid -> int
|
||||
= "stub_xc_evtchn_alloc_unbound"
|
||||
external evtchn_reset : handle -> domid -> unit = "stub_xc_evtchn_reset"
|
||||
external readconsolering : handle -> string = "stub_xc_readconsolering"
|
||||
external send_debug_keys : handle -> string -> unit = "stub_xc_send_debug_keys"
|
||||
external physinfo : handle -> physinfo = "stub_xc_physinfo"
|
||||
external pcpu_info: handle -> int -> int64 array = "stub_xc_pcpu_info"
|
||||
external domain_setmaxmem : handle -> domid -> int64 -> unit
|
||||
= "stub_xc_domain_setmaxmem"
|
||||
external domain_set_memmap_limit : handle -> domid -> int64 -> unit
|
||||
= "stub_xc_domain_set_memmap_limit"
|
||||
external domain_memory_increase_reservation :
|
||||
handle -> domid -> int64 -> unit
|
||||
= "stub_xc_domain_memory_increase_reservation"
|
||||
external map_foreign_range :
|
||||
handle -> domid -> int -> nativeint -> Mmap.mmap_interface
|
||||
= "stub_map_foreign_range"
|
||||
external domain_get_pfn_list :
|
||||
handle -> domid -> nativeint -> nativeint array
|
||||
= "stub_xc_domain_get_pfn_list"
|
||||
|
||||
external domain_assign_device: handle -> domid -> (int * int * int * int) -> unit
|
||||
= "stub_xc_domain_assign_device"
|
||||
external domain_deassign_device: handle -> domid -> (int * int * int * int) -> unit
|
||||
= "stub_xc_domain_deassign_device"
|
||||
external domain_test_assign_device: handle -> domid -> (int * int * int * int) -> bool
|
||||
= "stub_xc_domain_test_assign_device"
|
||||
|
||||
external domain_set_timer_mode: handle -> domid -> int -> unit = "stub_xc_domain_set_timer_mode"
|
||||
external domain_set_hpet: handle -> domid -> int -> unit = "stub_xc_domain_set_hpet"
|
||||
external domain_set_vpt_align: handle -> domid -> int -> unit = "stub_xc_domain_set_vpt_align"
|
||||
|
||||
external domain_send_s3resume: handle -> domid -> unit
|
||||
= "stub_xc_domain_send_s3resume"
|
||||
external domain_get_acpi_s_state: handle -> domid -> int = "stub_xc_domain_get_acpi_s_state"
|
||||
|
||||
external hvm_check_pvdriver : handle -> domid -> bool
|
||||
= "stub_xc_hvm_check_pvdriver"
|
||||
external version : handle -> version = "stub_xc_version_version"
|
||||
external version_compile_info : handle -> compile_info
|
||||
= "stub_xc_version_compile_info"
|
||||
external version_changeset : handle -> string = "stub_xc_version_changeset"
|
||||
external version_capabilities : handle -> string
|
||||
= "stub_xc_version_capabilities"
|
||||
type core_magic = Magic_hvm | Magic_pv
|
||||
type core_header = {
|
||||
xch_magic : core_magic;
|
||||
xch_nr_vcpus : int;
|
||||
xch_nr_pages : nativeint;
|
||||
xch_index_offset : int64;
|
||||
xch_ctxt_offset : int64;
|
||||
xch_pages_offset : int64;
|
||||
}
|
||||
external marshall_core_header : core_header -> string
|
||||
= "stub_marshall_core_header"
|
||||
val coredump : handle -> domid -> Unix.file_descr -> unit
|
||||
external pages_to_kib : int64 -> int64 = "stub_pages_to_kib"
|
||||
val pages_to_mib : int64 -> int64
|
||||
external watchdog : handle -> int -> int32 -> int
|
||||
= "stub_xc_watchdog"
|
||||
|
||||
external domain_set_machine_address_size: handle -> domid -> int -> unit
|
||||
= "stub_xc_domain_set_machine_address_size"
|
||||
external domain_get_machine_address_size: handle -> domid -> int
|
||||
= "stub_xc_domain_get_machine_address_size"
|
||||
|
||||
external domain_cpuid_set: handle -> domid -> bool -> (int64 * (int64 option))
|
||||
-> string option array
|
||||
-> string option array
|
||||
= "stub_xc_domain_cpuid_set"
|
||||
external domain_cpuid_apply: handle -> domid -> bool -> unit
|
||||
= "stub_xc_domain_cpuid_apply"
|
||||
external cpuid_check: (int64 * (int64 option)) -> string option array -> (bool * string option array)
|
||||
= "stub_xc_cpuid_check"
|
||||
|
||||
@@ -0,0 +1,116 @@
|
||||
#ifndef __LIBXC_CPUFEATURE_H
|
||||
#define __LIBXC_CPUFEATURE_H
|
||||
|
||||
/* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */
|
||||
#define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */
|
||||
#define X86_FEATURE_VME (0*32+ 1) /* Virtual Mode Extensions */
|
||||
#define X86_FEATURE_DE (0*32+ 2) /* Debugging Extensions */
|
||||
#define X86_FEATURE_PSE (0*32+ 3) /* Page Size Extensions */
|
||||
#define X86_FEATURE_TSC (0*32+ 4) /* Time Stamp Counter */
|
||||
#define X86_FEATURE_MSR (0*32+ 5) /* Model-Specific Registers, RDMSR, WRMSR */
|
||||
#define X86_FEATURE_PAE (0*32+ 6) /* Physical Address Extensions */
|
||||
#define X86_FEATURE_MCE (0*32+ 7) /* Machine Check Architecture */
|
||||
#define X86_FEATURE_CX8 (0*32+ 8) /* CMPXCHG8 instruction */
|
||||
#define X86_FEATURE_APIC (0*32+ 9) /* Onboard APIC */
|
||||
#define X86_FEATURE_SEP (0*32+11) /* SYSENTER/SYSEXIT */
|
||||
#define X86_FEATURE_MTRR (0*32+12) /* Memory Type Range Registers */
|
||||
#define X86_FEATURE_PGE (0*32+13) /* Page Global Enable */
|
||||
#define X86_FEATURE_MCA (0*32+14) /* Machine Check Architecture */
|
||||
#define X86_FEATURE_CMOV (0*32+15) /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
|
||||
#define X86_FEATURE_PAT (0*32+16) /* Page Attribute Table */
|
||||
#define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */
|
||||
#define X86_FEATURE_PN (0*32+18) /* Processor serial number */
|
||||
#define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */
|
||||
#define X86_FEATURE_DS (0*32+21) /* Debug Store */
|
||||
#define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */
|
||||
#define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */
|
||||
#define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */
|
||||
/* of FPU context), and CR4.OSFXSR available */
|
||||
#define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */
|
||||
#define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */
|
||||
#define X86_FEATURE_SELFSNOOP (0*32+27) /* CPU self snoop */
|
||||
#define X86_FEATURE_HT (0*32+28) /* Hyper-Threading */
|
||||
#define X86_FEATURE_ACC (0*32+29) /* Automatic clock control */
|
||||
#define X86_FEATURE_IA64 (0*32+30) /* IA-64 processor */
|
||||
#define X86_FEATURE_PBE (0*32+31) /* Pending Break Enable */
|
||||
|
||||
/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
|
||||
/* Don't duplicate feature flags which are redundant with Intel! */
|
||||
#define X86_FEATURE_SYSCALL (1*32+11) /* SYSCALL/SYSRET */
|
||||
#define X86_FEATURE_MP (1*32+19) /* MP Capable. */
|
||||
#define X86_FEATURE_NX (1*32+20) /* Execute Disable */
|
||||
#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
|
||||
#define X86_FEATURE_FFXSR (1*32+25) /* FFXSR instruction optimizations */
|
||||
#define X86_FEATURE_PAGE1GB (1*32+26) /* 1Gb large page support */
|
||||
#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */
|
||||
#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
|
||||
#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
|
||||
#define X86_FEATURE_3DNOW (1*32+31) /* 3DNow! */
|
||||
|
||||
/* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */
|
||||
#define X86_FEATURE_RECOVERY (2*32+ 0) /* CPU in recovery mode */
|
||||
#define X86_FEATURE_LONGRUN (2*32+ 1) /* Longrun power control */
|
||||
#define X86_FEATURE_LRTI (2*32+ 3) /* LongRun table interface */
|
||||
|
||||
/* Other features, Linux-defined mapping, word 3 */
|
||||
/* This range is used for feature bits which conflict or are synthesized */
|
||||
#define X86_FEATURE_CXMMX (3*32+ 0) /* Cyrix MMX extensions */
|
||||
#define X86_FEATURE_K6_MTRR (3*32+ 1) /* AMD K6 nonstandard MTRRs */
|
||||
#define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
|
||||
#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
|
||||
/* cpu types for specific tunings: */
|
||||
#define X86_FEATURE_K8 (3*32+ 4) /* Opteron, Athlon64 */
|
||||
#define X86_FEATURE_K7 (3*32+ 5) /* Athlon */
|
||||
#define X86_FEATURE_P3 (3*32+ 6) /* P3 */
|
||||
#define X86_FEATURE_P4 (3*32+ 7) /* P4 */
|
||||
#define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */
|
||||
|
||||
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
|
||||
#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
|
||||
#define X86_FEATURE_DTES64 (4*32+ 2) /* 64-bit Debug Store */
|
||||
#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */
|
||||
#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */
|
||||
#define X86_FEATURE_VMXE (4*32+ 5) /* Virtual Machine Extensions */
|
||||
#define X86_FEATURE_SMXE (4*32+ 6) /* Safer Mode Extensions */
|
||||
#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */
|
||||
#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */
|
||||
#define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental Streaming SIMD Extensions-3 */
|
||||
#define X86_FEATURE_CID (4*32+10) /* Context ID */
|
||||
#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */
|
||||
#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */
|
||||
#define X86_FEATURE_PDCM (4*32+15) /* Perf/Debug Capability MSR */
|
||||
#define X86_FEATURE_DCA (4*32+18) /* Direct Cache Access */
|
||||
#define X86_FEATURE_SSE4_1 (4*32+19) /* Streaming SIMD Extensions 4.1 */
|
||||
#define X86_FEATURE_SSE4_2 (4*32+20) /* Streaming SIMD Extensions 4.2 */
|
||||
#define X86_FEATURE_POPCNT (4*32+23) /* POPCNT instruction */
|
||||
#define X86_FEATURE_HYPERVISOR (4*32+31) /* Running under some hypervisor */
|
||||
|
||||
/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
|
||||
#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */
|
||||
#define X86_FEATURE_XSTORE_EN (5*32+ 3) /* on-CPU RNG enabled */
|
||||
#define X86_FEATURE_XCRYPT (5*32+ 6) /* on-CPU crypto (xcrypt insn) */
|
||||
#define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */
|
||||
#define X86_FEATURE_ACE2 (5*32+ 8) /* Advanced Cryptography Engine v2 */
|
||||
#define X86_FEATURE_ACE2_EN (5*32+ 9) /* ACE v2 enabled */
|
||||
#define X86_FEATURE_PHE (5*32+ 10) /* PadLock Hash Engine */
|
||||
#define X86_FEATURE_PHE_EN (5*32+ 11) /* PHE enabled */
|
||||
#define X86_FEATURE_PMM (5*32+ 12) /* PadLock Montgomery Multiplier */
|
||||
#define X86_FEATURE_PMM_EN (5*32+ 13) /* PMM enabled */
|
||||
|
||||
/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */
|
||||
#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */
|
||||
#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */
|
||||
#define X86_FEATURE_SVME (6*32+ 2) /* Secure Virtual Machine */
|
||||
#define X86_FEATURE_EXTAPICSPACE (6*32+ 3) /* Extended APIC space */
|
||||
#define X86_FEATURE_ALTMOVCR (6*32+ 4) /* LOCK MOV CR accesses CR+8 */
|
||||
#define X86_FEATURE_ABM (6*32+ 5) /* Advanced Bit Manipulation */
|
||||
#define X86_FEATURE_SSE4A (6*32+ 6) /* AMD Streaming SIMD Extensions-4a */
|
||||
#define X86_FEATURE_MISALIGNSSE (6*32+ 7) /* Misaligned SSE Access */
|
||||
#define X86_FEATURE_3DNOWPF (6*32+ 8) /* 3DNow! Prefetch */
|
||||
#define X86_FEATURE_OSVW (6*32+ 9) /* OS Visible Workaround */
|
||||
#define X86_FEATURE_IBS (6*32+ 10) /* Instruction Based Sampling */
|
||||
#define X86_FEATURE_SSE5 (6*32+ 11) /* AMD Streaming SIMD Extensions-5 */
|
||||
#define X86_FEATURE_SKINIT (6*32+ 12) /* SKINIT, STGI/CLGI, DEV */
|
||||
#define X86_FEATURE_WDT (6*32+ 13) /* Watchdog Timer */
|
||||
|
||||
#endif /* __LIBXC_CPUFEATURE_H */
|
||||
@@ -0,0 +1,285 @@
|
||||
#ifndef XC_CPUID_H
|
||||
#define XC_CPUID_H
|
||||
|
||||
#ifdef XEN_DOMCTL_set_cpuid
|
||||
|
||||
#include "xc_cpufeature.h"
|
||||
|
||||
#define bitmaskof(idx) (1u << ((idx) & 31))
|
||||
#define clear_bit(idx, dst) ((dst) &= ~(1u << ((idx) & 31)))
|
||||
#define set_bit(idx, dst) ((dst) |= (1u << ((idx) & 31)))
|
||||
|
||||
#define DEF_MAX_BASE 0x00000004u
|
||||
#define DEF_MAX_EXT 0x80000008u
|
||||
|
||||
static void xc_cpuid(uint32_t eax, uint32_t ecx, uint32_t regs[4])
|
||||
{
|
||||
unsigned int realecx = (ecx == XEN_CPUID_INPUT_UNUSED) ? 0 : ecx;
|
||||
asm (
|
||||
#ifdef __i386__
|
||||
"push %%ebx; cpuid; mov %%ebx,%1; pop %%ebx"
|
||||
#else
|
||||
"push %%rbx; cpuid; mov %%ebx,%1; pop %%rbx"
|
||||
#endif
|
||||
: "=a" (regs[0]), "=r" (regs[1]), "=c" (regs[2]), "=d" (regs[3])
|
||||
: "0" (eax), "2" (realecx));
|
||||
}
|
||||
|
||||
enum { CPU_BRAND_INTEL, CPU_BRAND_AMD, CPU_BRAND_UNKNOWN };
|
||||
|
||||
static int xc_cpuid_brand_get(void)
|
||||
{
|
||||
uint32_t regs[4];
|
||||
char str[13];
|
||||
uint32_t *istr = (uint32_t *) str;
|
||||
|
||||
xc_cpuid(0, 0, regs);
|
||||
istr[0] = regs[1];
|
||||
istr[1] = regs[3];
|
||||
istr[2] = regs[2];
|
||||
str[12] = '\0';
|
||||
if (strcmp(str, "AuthenticAMD") == 0) {
|
||||
return CPU_BRAND_AMD;
|
||||
} else if (strcmp(str, "GenuineIntel") == 0) {
|
||||
return CPU_BRAND_INTEL;
|
||||
} else
|
||||
return CPU_BRAND_UNKNOWN;
|
||||
}
|
||||
|
||||
static int hypervisor_is_64bit(int xc)
|
||||
{
|
||||
xen_capabilities_info_t xen_caps;
|
||||
return ((xc_version(xc, XENVER_capabilities, &xen_caps) == 0) &&
|
||||
(strstr(xen_caps, "x86_64") != NULL));
|
||||
}
|
||||
|
||||
static void do_hvm_cpuid_policy(int xc, int domid, uint32_t input, uint32_t regs[4])
|
||||
{
|
||||
unsigned long is_pae;
|
||||
int brand;
|
||||
|
||||
/* pae ? */
|
||||
xc_get_hvm_param(xc, domid, HVM_PARAM_PAE_ENABLED, &is_pae);
|
||||
is_pae = !!is_pae;
|
||||
|
||||
switch (input) {
|
||||
case 0x00000000:
|
||||
if (regs[0] > DEF_MAX_BASE)
|
||||
regs[0] = DEF_MAX_BASE;
|
||||
break;
|
||||
case 0x00000001:
|
||||
regs[2] &= (bitmaskof(X86_FEATURE_XMM3) |
|
||||
bitmaskof(X86_FEATURE_SSSE3) |
|
||||
bitmaskof(X86_FEATURE_CX16) |
|
||||
bitmaskof(X86_FEATURE_SSE4_1) |
|
||||
bitmaskof(X86_FEATURE_SSE4_2) |
|
||||
bitmaskof(X86_FEATURE_POPCNT));
|
||||
|
||||
regs[2] |= bitmaskof(X86_FEATURE_HYPERVISOR);
|
||||
|
||||
regs[3] &= (bitmaskof(X86_FEATURE_FPU) |
|
||||
bitmaskof(X86_FEATURE_VME) |
|
||||
bitmaskof(X86_FEATURE_DE) |
|
||||
bitmaskof(X86_FEATURE_PSE) |
|
||||
bitmaskof(X86_FEATURE_TSC) |
|
||||
bitmaskof(X86_FEATURE_MSR) |
|
||||
bitmaskof(X86_FEATURE_PAE) |
|
||||
bitmaskof(X86_FEATURE_MCE) |
|
||||
bitmaskof(X86_FEATURE_CX8) |
|
||||
bitmaskof(X86_FEATURE_APIC) |
|
||||
bitmaskof(X86_FEATURE_SEP) |
|
||||
bitmaskof(X86_FEATURE_MTRR) |
|
||||
bitmaskof(X86_FEATURE_PGE) |
|
||||
bitmaskof(X86_FEATURE_MCA) |
|
||||
bitmaskof(X86_FEATURE_CMOV) |
|
||||
bitmaskof(X86_FEATURE_PAT) |
|
||||
bitmaskof(X86_FEATURE_CLFLSH) |
|
||||
bitmaskof(X86_FEATURE_MMX) |
|
||||
bitmaskof(X86_FEATURE_FXSR) |
|
||||
bitmaskof(X86_FEATURE_XMM) |
|
||||
bitmaskof(X86_FEATURE_XMM2));
|
||||
/* We always support MTRR MSRs. */
|
||||
regs[3] |= bitmaskof(X86_FEATURE_MTRR);
|
||||
|
||||
if (!is_pae)
|
||||
clear_bit(X86_FEATURE_PAE, regs[3]);
|
||||
break;
|
||||
case 0x80000000:
|
||||
if (regs[0] > DEF_MAX_EXT)
|
||||
regs[0] = DEF_MAX_EXT;
|
||||
break;
|
||||
case 0x80000001:
|
||||
if (!is_pae)
|
||||
clear_bit(X86_FEATURE_NX, regs[3]);
|
||||
break;
|
||||
case 0x80000008:
|
||||
regs[0] &= 0x0000ffffu;
|
||||
regs[1] = regs[2] = regs[3] = 0;
|
||||
break;
|
||||
case 0x00000002: /* Intel cache info (dumped by AMD policy) */
|
||||
case 0x00000004: /* Intel cache info (dumped by AMD policy) */
|
||||
case 0x80000002: /* Processor name string */
|
||||
case 0x80000003: /* ... continued */
|
||||
case 0x80000004: /* ... continued */
|
||||
case 0x80000005: /* AMD L1 cache/TLB info (dumped by Intel policy) */
|
||||
case 0x80000006: /* AMD L2/3 cache/TLB info ; Intel L2 cache features */
|
||||
break;
|
||||
default:
|
||||
regs[0] = regs[1] = regs[2] = regs[3] = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
brand = xc_cpuid_brand_get();
|
||||
if (brand == CPU_BRAND_AMD) {
|
||||
switch (input) {
|
||||
case 0x00000001:
|
||||
/* Mask Intel-only features. */
|
||||
regs[2] &= ~(bitmaskof(X86_FEATURE_SSSE3) |
|
||||
bitmaskof(X86_FEATURE_SSE4_1) |
|
||||
bitmaskof(X86_FEATURE_SSE4_2));
|
||||
break;
|
||||
|
||||
case 0x00000002:
|
||||
case 0x00000004:
|
||||
regs[0] = regs[1] = regs[2] = 0;
|
||||
break;
|
||||
|
||||
case 0x80000001: {
|
||||
int is_64bit = hypervisor_is_64bit(xc) && is_pae;
|
||||
|
||||
if (!is_pae)
|
||||
clear_bit(X86_FEATURE_PAE, regs[3]);
|
||||
clear_bit(X86_FEATURE_PSE36, regs[3]);
|
||||
|
||||
/* Filter all other features according to a whitelist. */
|
||||
regs[2] &= ((is_64bit ? bitmaskof(X86_FEATURE_LAHF_LM) : 0) |
|
||||
bitmaskof(X86_FEATURE_ALTMOVCR) |
|
||||
bitmaskof(X86_FEATURE_ABM) |
|
||||
bitmaskof(X86_FEATURE_SSE4A) |
|
||||
bitmaskof(X86_FEATURE_MISALIGNSSE) |
|
||||
bitmaskof(X86_FEATURE_3DNOWPF));
|
||||
regs[3] &= (0x0183f3ff | /* features shared with 0x00000001:EDX */
|
||||
(is_pae ? bitmaskof(X86_FEATURE_NX) : 0) |
|
||||
(is_64bit ? bitmaskof(X86_FEATURE_LM) : 0) |
|
||||
bitmaskof(X86_FEATURE_SYSCALL) |
|
||||
bitmaskof(X86_FEATURE_MP) |
|
||||
bitmaskof(X86_FEATURE_MMXEXT) |
|
||||
bitmaskof(X86_FEATURE_FFXSR) |
|
||||
bitmaskof(X86_FEATURE_3DNOW) |
|
||||
bitmaskof(X86_FEATURE_3DNOWEXT));
|
||||
break;
|
||||
}
|
||||
}
|
||||
} else if (brand == CPU_BRAND_INTEL) {
|
||||
switch (input) {
|
||||
case 0x00000001:
|
||||
/* Mask AMD-only features. */
|
||||
regs[2] &= ~(bitmaskof(X86_FEATURE_POPCNT));
|
||||
break;
|
||||
|
||||
case 0x00000004:
|
||||
regs[0] &= 0x3FF;
|
||||
regs[3] &= 0x3FF;
|
||||
break;
|
||||
|
||||
case 0x80000001:
|
||||
{
|
||||
int is_64bit = hypervisor_is_64bit(xc) && is_pae;
|
||||
|
||||
/* Only a few features are advertised in Intel's 0x80000001. */
|
||||
regs[2] &= (is_64bit ? bitmaskof(X86_FEATURE_LAHF_LM) : 0);
|
||||
regs[3] &= ((is_pae ? bitmaskof(X86_FEATURE_NX) : 0) |
|
||||
(is_64bit ? bitmaskof(X86_FEATURE_LM) : 0) |
|
||||
(is_64bit ? bitmaskof(X86_FEATURE_SYSCALL) : 0));
|
||||
break;
|
||||
}
|
||||
case 0x80000005:
|
||||
{
|
||||
regs[0] = regs[1] = regs[2] = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void do_pv_cpuid_policy(int xc, int domid, uint32_t input, uint32_t regs[4])
|
||||
{
|
||||
int brand;
|
||||
int guest_64_bits, xen_64_bits;
|
||||
int ret;
|
||||
|
||||
ret = xc_domain_get_machine_address_size(xc, domid);
|
||||
if (ret < 0)
|
||||
return;
|
||||
guest_64_bits = (ret == 64);
|
||||
xen_64_bits = hypervisor_is_64bit(xc);
|
||||
brand = xc_cpuid_brand_get();
|
||||
|
||||
if ((input & 0x7fffffff) == 1) {
|
||||
clear_bit(X86_FEATURE_VME, regs[3]);
|
||||
clear_bit(X86_FEATURE_PSE, regs[3]);
|
||||
clear_bit(X86_FEATURE_PGE, regs[3]);
|
||||
clear_bit(X86_FEATURE_MCE, regs[3]);
|
||||
clear_bit(X86_FEATURE_MCA, regs[3]);
|
||||
clear_bit(X86_FEATURE_MTRR, regs[3]);
|
||||
clear_bit(X86_FEATURE_PSE36, regs[3]);
|
||||
}
|
||||
|
||||
switch (input) {
|
||||
case 1:
|
||||
if (!xen_64_bits || brand == CPU_BRAND_AMD)
|
||||
clear_bit(X86_FEATURE_SEP, regs[3]);
|
||||
clear_bit(X86_FEATURE_DS, regs[3]);
|
||||
clear_bit(X86_FEATURE_ACC, regs[3]);
|
||||
clear_bit(X86_FEATURE_PBE, regs[3]);
|
||||
|
||||
clear_bit(X86_FEATURE_DTES64, regs[2]);
|
||||
clear_bit(X86_FEATURE_MWAIT, regs[2]);
|
||||
clear_bit(X86_FEATURE_DSCPL, regs[2]);
|
||||
clear_bit(X86_FEATURE_VMXE, regs[2]);
|
||||
clear_bit(X86_FEATURE_SMXE, regs[2]);
|
||||
clear_bit(X86_FEATURE_EST, regs[2]);
|
||||
clear_bit(X86_FEATURE_TM2, regs[2]);
|
||||
if (!guest_64_bits)
|
||||
clear_bit(X86_FEATURE_CX16, regs[2]);
|
||||
clear_bit(X86_FEATURE_XTPR, regs[2]);
|
||||
clear_bit(X86_FEATURE_PDCM, regs[2]);
|
||||
clear_bit(X86_FEATURE_DCA, regs[2]);
|
||||
break;
|
||||
case 0x80000001:
|
||||
if (!guest_64_bits) {
|
||||
clear_bit(X86_FEATURE_LM, regs[3]);
|
||||
clear_bit(X86_FEATURE_LAHF_LM, regs[2]);
|
||||
if (brand != CPU_BRAND_AMD)
|
||||
clear_bit(X86_FEATURE_SYSCALL, regs[3]);
|
||||
} else
|
||||
set_bit(X86_FEATURE_SYSCALL, regs[3]);
|
||||
clear_bit(X86_FEATURE_PAGE1GB, regs[3]);
|
||||
clear_bit(X86_FEATURE_RDTSCP, regs[3]);
|
||||
|
||||
clear_bit(X86_FEATURE_SVME, regs[2]);
|
||||
clear_bit(X86_FEATURE_OSVW, regs[2]);
|
||||
clear_bit(X86_FEATURE_IBS, regs[2]);
|
||||
clear_bit(X86_FEATURE_SKINIT, regs[2]);
|
||||
clear_bit(X86_FEATURE_WDT, regs[2]);
|
||||
break;
|
||||
case 5: /* MONITOR/MWAIT */
|
||||
case 0xa: /* Architectural Performance Monitor Features */
|
||||
case 0x8000000a: /* SVM revision and features */
|
||||
case 0x8000001b: /* Instruction Based Sampling */
|
||||
regs[0] = regs[1] = regs[2] = regs[3] = 0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void do_cpuid_policy(int xc, int domid, int hvm, uint32_t input, uint32_t regs[4])
|
||||
{
|
||||
if (hvm)
|
||||
do_hvm_cpuid_policy(xc, domid, input, regs);
|
||||
else
|
||||
do_pv_cpuid_policy(xc, domid, input, regs);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,20 @@
|
||||
#ifndef __XC_E820_H__
|
||||
#define __XC_E820_H__
|
||||
|
||||
#include <xen/hvm/e820.h>
|
||||
|
||||
/*
|
||||
* PC BIOS standard E820 types and structure.
|
||||
*/
|
||||
#define E820_RAM 1
|
||||
#define E820_RESERVED 2
|
||||
#define E820_ACPI 3
|
||||
#define E820_NVS 4
|
||||
|
||||
struct e820entry {
|
||||
uint64_t addr;
|
||||
uint64_t size;
|
||||
uint32_t type;
|
||||
} __attribute__((packed));
|
||||
|
||||
#endif /* __XC_E820_H__ */
|
||||
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File diff suppressed because it is too large.
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