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x86/msr: Fix 'plaform' typo
Reported-by: Jan Beulich <jbeulich@suse.com> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Jan Beulich <jbeulich@suse.com>
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Andrew Cooper committed
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948a4f6af3
commit
8e2c94de26
4 files changed
+9
-9
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@@ -124,7 +124,7 @@ bool __init probe_cpuid_faulting(void)
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return false;
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return false;
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if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0)
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if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0)
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raw_msr_policy.plaform_info.cpuid_faulting =
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raw_msr_policy.platform_info.cpuid_faulting =
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val & MSR_PLATFORM_INFO_CPUID_FAULTING;
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val & MSR_PLATFORM_INFO_CPUID_FAULTING;
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if (rc ||
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if (rc ||
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+5
-5
@@ -51,7 +51,7 @@ static void __init calculate_host_policy(void)
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/* 0x000000ce MSR_INTEL_PLATFORM_INFO */
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/* 0x000000ce MSR_INTEL_PLATFORM_INFO */
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/* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */
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/* probe_cpuid_faulting() sanity checks presence of MISC_FEATURES_ENABLES */
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mp->plaform_info.cpuid_faulting = cpu_has_cpuid_faulting;
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mp->platform_info.cpuid_faulting = cpu_has_cpuid_faulting;
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}
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}
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static void __init calculate_hvm_max_policy(void)
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static void __init calculate_hvm_max_policy(void)
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@@ -64,7 +64,7 @@ static void __init calculate_hvm_max_policy(void)
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*mp = host_msr_policy;
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*mp = host_msr_policy;
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/* It's always possible to emulate CPUID faulting for HVM guests */
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/* It's always possible to emulate CPUID faulting for HVM guests */
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mp->plaform_info.cpuid_faulting = true;
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mp->platform_info.cpuid_faulting = true;
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}
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}
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static void __init calculate_pv_max_policy(void)
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static void __init calculate_pv_max_policy(void)
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@@ -93,7 +93,7 @@ int init_domain_msr_policy(struct domain *d)
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/* See comment in intel_ctxt_switch_levelling() */
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/* See comment in intel_ctxt_switch_levelling() */
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if ( is_control_domain(d) )
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if ( is_control_domain(d) )
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mp->plaform_info.cpuid_faulting = false;
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mp->platform_info.cpuid_faulting = false;
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d->arch.msr = mp;
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d->arch.msr = mp;
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@@ -165,7 +165,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
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break;
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break;
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case MSR_INTEL_PLATFORM_INFO:
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case MSR_INTEL_PLATFORM_INFO:
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*val = mp->plaform_info.raw;
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*val = mp->platform_info.raw;
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break;
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break;
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case MSR_ARCH_CAPABILITIES:
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case MSR_ARCH_CAPABILITIES:
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@@ -358,7 +358,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
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bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting;
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bool old_cpuid_faulting = msrs->misc_features_enables.cpuid_faulting;
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rsvd = ~0ull;
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rsvd = ~0ull;
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if ( mp->plaform_info.cpuid_faulting )
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if ( mp->platform_info.cpuid_faulting )
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rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING;
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rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING;
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if ( val & rsvd )
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if ( val & rsvd )
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@@ -22,7 +22,7 @@ struct msr_policy
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uint32_t :31;
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uint32_t :31;
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bool cpuid_faulting:1;
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bool cpuid_faulting:1;
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};
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};
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} plaform_info;
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} platform_info;
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};
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};
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#ifdef __XEN__
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#ifdef __XEN__
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+2
-2
@@ -38,7 +38,7 @@ int x86_msr_copy_to_buffer(const struct msr_policy *p,
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return ret; \
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return ret; \
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})
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})
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COPY_MSR(MSR_INTEL_PLATFORM_INFO, p->plaform_info.raw);
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COPY_MSR(MSR_INTEL_PLATFORM_INFO, p->platform_info.raw);
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#undef COPY_MSR
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#undef COPY_MSR
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@@ -95,7 +95,7 @@ int x86_msr_copy_from_buffer(struct msr_policy *p,
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p->field = data.val; \
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p->field = data.val; \
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})
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})
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case MSR_INTEL_PLATFORM_INFO: ASSIGN(plaform_info.raw); break;
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case MSR_INTEL_PLATFORM_INFO: ASSIGN(platform_info.raw); break;
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#undef ASSIGN
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#undef ASSIGN
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