diff --git a/linux-2.6.8.1-xen-sparse/include/asm-xen/asm-i386/system.h b/linux-2.6.8.1-xen-sparse/include/asm-xen/asm-i386/system.h index 822c57f29a..133f1eaf49 100644 --- a/linux-2.6.8.1-xen-sparse/include/asm-xen/asm-i386/system.h +++ b/linux-2.6.8.1-xen-sparse/include/asm-xen/asm-i386/system.h @@ -122,9 +122,13 @@ static inline unsigned long _get_base(char * addr) #endif /* __KERNEL__ */ -#define wbinvd() \ - BUG(); -// __asm__ __volatile__ ("wbinvd": : :"memory"); +static inline void wbinvd(void) +{ + mmu_update_t u; + u.ptr = MMU_EXTENDED_COMMAND; + u.val = MMUEXT_FLUSH_CACHE; + (void)HYPERVISOR_mmu_update(&u, 1, NULL); +} static inline unsigned long get_limit(unsigned long segment) { diff --git a/xen/arch/x86/memory.c b/xen/arch/x86/memory.c index 5d95bea71e..35a248a50d 100644 --- a/xen/arch/x86/memory.c +++ b/xen/arch/x86/memory.c @@ -905,6 +905,18 @@ static int do_extended_command(unsigned long ptr, unsigned long val) __flush_tlb_one(ptr); break; + case MMUEXT_FLUSH_CACHE: + if ( unlikely(!IS_CAPABLE_PHYSDEV(d)) ) + { + MEM_LOG("Non-physdev domain tried to FLUSH_CACHE.\n"); + okay = 0; + } + else + { + wbinvd(); + } + break; + case MMUEXT_SET_LDT: { unsigned long ents = val >> MMUEXT_CMD_SHIFT; diff --git a/xen/include/hypervisor-ifs/dom0_ops.h b/xen/include/hypervisor-ifs/dom0_ops.h index 7dec0af739..ebac7397bd 100644 --- a/xen/include/hypervisor-ifs/dom0_ops.h +++ b/xen/include/hypervisor-ifs/dom0_ops.h @@ -19,7 +19,7 @@ * This makes sure that old versions of dom0 tools will stop working in a * well-defined way (rather than crashing the machine, for instance). */ -#define DOM0_INTERFACE_VERSION 0xAAAA0012 +#define DOM0_INTERFACE_VERSION 0xAAAA0013 #define MAX_DOMAIN_NAME 16 diff --git a/xen/include/hypervisor-ifs/hypervisor-if.h b/xen/include/hypervisor-ifs/hypervisor-if.h index 36528bfda4..2b9f8c7166 100644 --- a/xen/include/hypervisor-ifs/hypervisor-if.h +++ b/xen/include/hypervisor-ifs/hypervisor-if.h @@ -117,6 +117,9 @@ * val[7:0] == MMUEXT_INVLPG: * ptr[:2] -- Linear address to be flushed from the TLB. * + * val[7:0] == MMUEXT_FLUSH_CACHE: + * No additional arguments. Writes back and flushes cache contents. + * * val[7:0] == MMUEXT_SET_LDT: * ptr[:2] -- Linear address of LDT base (NB. must be page-aligned). * val[:8] -- Number of entries in LDT. @@ -143,15 +146,16 @@ #define MMU_MACHPHYS_UPDATE 2 /* ptr = MA of frame to modify entry for */ #define MMU_EXTENDED_COMMAND 3 /* least 8 bits of val demux further */ #define MMUEXT_PIN_TABLE 0 /* ptr = MA of frame to pin */ -#define MMUEXT_UNPIN_TABLE 4 /* ptr = MA of frame to unpin */ -#define MMUEXT_NEW_BASEPTR 5 /* ptr = MA of new pagetable base */ -#define MMUEXT_TLB_FLUSH 6 /* ptr = NULL */ -#define MMUEXT_INVLPG 7 /* ptr = VA to invalidate */ -#define MMUEXT_SET_LDT 8 /* ptr = VA of table; val = # entries */ +#define MMUEXT_UNPIN_TABLE 1 /* ptr = MA of frame to unpin */ +#define MMUEXT_NEW_BASEPTR 2 /* ptr = MA of new pagetable base */ +#define MMUEXT_TLB_FLUSH 3 /* ptr = NULL */ +#define MMUEXT_INVLPG 4 /* ptr = VA to invalidate */ +#define MMUEXT_FLUSH_CACHE 5 +#define MMUEXT_SET_LDT 6 /* ptr = VA of table; val = # entries */ +#define MMUEXT_SET_FOREIGNDOM 7 /* val[31:16] = dom */ +#define MMUEXT_CLEAR_FOREIGNDOM 8 #define MMUEXT_TRANSFER_PAGE 9 /* ptr = MA of frame; val[31:16] = dom */ -#define MMUEXT_SET_FOREIGNDOM 10 /* val[31:16] = dom */ -#define MMUEXT_CLEAR_FOREIGNDOM 11 -#define MMUEXT_REASSIGN_PAGE 12 +#define MMUEXT_REASSIGN_PAGE 10 #define MMUEXT_CMD_MASK 255 #define MMUEXT_CMD_SHIFT 8