build: generic top-level rule to build individual files

In particular when cross-compiling or having in place other tool chain
overrides, invoking make to build individual files (e.g. object,
preprocessed, or assembly ones) so far involves putting the various
overrides on the command line instead of simply getting them from
./.config.

Furthermore this helps working around a yet unaddressed make quirk [1]:
Variables put on the command line are invisible to $(shell ...), unless
invoked from a recursive make: During the recursive invocation such
variables are put in the recursive make's environment and hence become
"visible".

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>

[1] https://savannah.gnu.org/bugs/?10593

Makefile

@@ -75,6 +75,13 @@ ifeq (x86_64,$(XEN_TARGET_ARCH))
 	XEN_TARGET_ARCH=x86_32 $(MAKE) -C stubdom pv-grub-if-enabled
 endif
 
+define do-subtree
+$(1)/%: FORCE
+	$$(MAKE) -C $(1) $$*
+endef
+
+$(foreach m,$(wildcard */Makefile),$(eval $(call do-subtree,$(patsubst %/Makefile,%,$(m)))))
+
 .PHONY: build-docs
 build-docs:
 	$(MAKE) -C docs build
@@ -334,3 +341,6 @@ uninstall: uninstall-tools-public-headers $(TARGS_UNINSTALL)
 .PHONY: xenversion
 xenversion:
 	@$(MAKE) --no-print-directory -C xen xenversion
+
+.PHONY: FORCE
+FORCE: