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https://github.com/xen-project/xen.git
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x86: Avoid assumptions about C struct layouts from asm code.
Largely this involves avoiding assumptions about 'struct cpu_info'. Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
This commit is contained in:
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f65bd343b0
commit
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12 files changed
+71
-123
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@@ -13,10 +13,13 @@
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#include <asm/hvm/hvm.h>
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#include <asm/hvm/support.h>
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#include <asm/i387.h>
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#include <xen/hypercall.h>
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#if defined(CONFIG_X86_64)
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static unsigned long saved_lstar, saved_cstar;
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static unsigned long saved_sysenter_esp, saved_sysenter_eip;
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static unsigned long saved_fs_base, saved_gs_base, saved_kernel_gs_base;
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static uint16_t saved_segs[4];
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#endif
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void save_rest_processor_state(void)
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@@ -25,6 +28,12 @@ void save_rest_processor_state(void)
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unlazy_fpu(current);
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#if defined(CONFIG_X86_64)
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asm volatile (
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"mov %%ds,(%0); mov %%es,2(%0); mov %%fs,4(%0); mov %%gs,6(%0)"
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: : "r" (saved_segs) : "memory" );
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rdmsrl(MSR_FS_BASE, saved_fs_base);
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rdmsrl(MSR_GS_BASE, saved_gs_base);
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rdmsrl(MSR_SHADOW_GS_BASE, saved_kernel_gs_base);
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rdmsrl(MSR_CSTAR, saved_cstar);
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rdmsrl(MSR_LSTAR, saved_lstar);
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if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
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@@ -35,9 +44,10 @@ void save_rest_processor_state(void)
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#endif
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}
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void restore_rest_processor_state(void)
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{
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struct vcpu *v = current;
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struct vcpu *curr = current;
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load_TR();
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@@ -51,6 +61,10 @@ void restore_rest_processor_state(void)
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X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_TF,
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0U);
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wrmsrl(MSR_FS_BASE, saved_fs_base);
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wrmsrl(MSR_GS_BASE, saved_gs_base);
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wrmsrl(MSR_SHADOW_GS_BASE, saved_kernel_gs_base);
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if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
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{
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/* Recover sysenter MSRs */
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@@ -58,21 +72,30 @@ void restore_rest_processor_state(void)
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wrmsrl(MSR_IA32_SYSENTER_EIP, saved_sysenter_eip);
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wrmsr(MSR_IA32_SYSENTER_CS, __HYPERVISOR_CS, 0);
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}
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if ( !is_idle_vcpu(curr) )
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{
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asm volatile (
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"mov (%0),%%ds; mov 2(%0),%%es; mov 4(%0),%%fs"
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: : "r" (saved_segs) : "memory" );
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do_set_segment_base(SEGBASE_GS_USER_SEL, saved_segs[3]);
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}
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#else /* !defined(CONFIG_X86_64) */
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if ( supervisor_mode_kernel && cpu_has_sep )
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wrmsr(MSR_IA32_SYSENTER_ESP, &this_cpu(init_tss).esp1, 0);
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#endif
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/* Maybe load the debug registers. */
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BUG_ON(is_hvm_vcpu(v));
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if ( !is_idle_vcpu(v) && unlikely(v->arch.guest_context.debugreg[7]) )
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BUG_ON(is_hvm_vcpu(curr));
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if ( !is_idle_vcpu(curr) && curr->arch.guest_context.debugreg[7] )
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{
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write_debugreg(0, v->arch.guest_context.debugreg[0]);
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write_debugreg(1, v->arch.guest_context.debugreg[1]);
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write_debugreg(2, v->arch.guest_context.debugreg[2]);
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write_debugreg(3, v->arch.guest_context.debugreg[3]);
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write_debugreg(6, v->arch.guest_context.debugreg[6]);
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write_debugreg(7, v->arch.guest_context.debugreg[7]);
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write_debugreg(0, curr->arch.guest_context.debugreg[0]);
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write_debugreg(1, curr->arch.guest_context.debugreg[1]);
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write_debugreg(2, curr->arch.guest_context.debugreg[2]);
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write_debugreg(3, curr->arch.guest_context.debugreg[3]);
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write_debugreg(6, curr->arch.guest_context.debugreg[6]);
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write_debugreg(7, curr->arch.guest_context.debugreg[7]);
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}
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/* Reload FPU state on next FPU use. */
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@@ -20,21 +20,6 @@
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#define REF(x) x(%rip)
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#define RDMSR(ind, m) \
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xorq %rdx, %rdx; \
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mov $ind, %ecx; \
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rdmsr; \
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shlq $0x20, %rdx; \
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orq %rax, %rdx; \
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movq %rdx, m(%rip);
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#define WRMSR(ind, m) \
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mov $ind, %ecx; \
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movq m(%rip), %rdx; \
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mov %edx, %eax; \
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shrq $0x20, %rdx; \
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wrmsr;
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#else /* !defined(__x86_64__) */
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.code32
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@@ -76,21 +61,16 @@ ENTRY(do_suspend_lowlevel)
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mov %cr8, GREG(ax)
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mov GREG(ax), REF(saved_cr8)
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RDMSR(MSR_FS_BASE, saved_fs_base)
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RDMSR(MSR_GS_BASE, saved_gs_base)
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RDMSR(MSR_SHADOW_GS_BASE, saved_kernel_gs_base)
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#else /* !defined(__x86_64__) */
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pushfl;
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popl SAVED_GREG(flags)
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#endif
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mov %ds, REF(saved_ds)
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mov %es, REF(saved_es)
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mov %fs, REF(saved_fs)
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mov %gs, REF(saved_gs)
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#endif
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mov %ss, REF(saved_ss)
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sgdt REF(saved_gdt)
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@@ -148,41 +128,12 @@ __ret_point:
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pushq %rax
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lretq
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1:
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mov REF(saved_cr8), %rax
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mov %rax, %cr8
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pushq SAVED_GREG(flags)
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popfq
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/* Idle vcpu doesn't need segment selectors reload, since
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* those may contain stale value from other domains and
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* reload may result page fault due to no matched gdt entry
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*/
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mov $(STACK_SIZE - 8), %rax
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or %rsp, %rax
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and $~7, %rax
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mov (%rax), %rax
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mov 0x10(%rax), %rax
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cmpw $0x7fff, (%rax)
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je 1f
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/* These selectors are from guest, and thus need reload */
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mov REF(saved_ds), %ds
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mov REF(saved_es), %es
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mov REF(saved_fs), %fs
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/* gs load is special */
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mov REF(saved_gs), %rsi
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mov $3, %rdi # SEGBASE_GS_USER_SEL
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call do_set_segment_base
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1:
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# MSR restore
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WRMSR(MSR_FS_BASE, saved_fs_base)
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WRMSR(MSR_GS_BASE, saved_gs_base)
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WRMSR(MSR_SHADOW_GS_BASE, saved_kernel_gs_base)
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#else /* !defined(__x86_64__) */
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pushl SAVED_GREG(flags)
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@@ -217,16 +168,11 @@ __ret_point:
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.data
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.align 16
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saved_ds: .word 0
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saved_es: .word 0
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saved_ss: .word 0
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saved_gs: .word 0
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saved_fs: .word 0
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.align 4
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.globl saved_magic
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saved_magic: .long 0x9abcdef0
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saved_ss: .word 0
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.align 8
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DECLARE_GREG(sp)
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DECLARE_GREG(bp)
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@@ -257,10 +203,6 @@ saved_cr0: .quad 0
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saved_cr3: .quad 0
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saved_cr8: .quad 0
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saved_gs_base: .quad 0
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saved_fs_base: .quad 0
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saved_kernel_gs_base: .quad 0
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#else /* !defined(__x86_64__) */
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saved_gdt: .long 0,0
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@@ -270,4 +212,7 @@ saved_ldt: .long 0
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saved_cr0: .long 0
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saved_cr3: .long 0
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saved_ds: .word 0
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saved_es: .word 0
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#endif
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@@ -101,7 +101,7 @@ __start:
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mov $0x80000001,%eax
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cpuid
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1: mov %edx,sym_phys(cpuid_ext_features)
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mov %edx,sym_phys(boot_cpu_data)+CPUINFO_ext_features
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mov %edx,sym_phys(boot_cpu_data)+CPUINFO86_ext_features
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#if defined(__x86_64__)
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/* Check for availability of long mode. */
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@@ -31,12 +31,8 @@
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#define STGI .byte 0x0F,0x01,0xDC
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#define CLGI .byte 0x0F,0x01,0xDD
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#define get_current(reg) \
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mov $STACK_SIZE-BYTES_PER_LONG, r(reg); \
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or r(sp), r(reg); \
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and $~(BYTES_PER_LONG-1),r(reg); \
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mov (r(reg)),r(reg);
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#define get_current(reg) GET_CURRENT(r(reg))
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#if defined(__x86_64__)
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#define r(reg) %r##reg
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#define addr_of(lbl) lbl(%rip)
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@@ -36,11 +36,7 @@
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#define GUEST_RIP 0x681e
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#define GUEST_RFLAGS 0x6820
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#define get_current(reg) \
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mov $STACK_SIZE-BYTES_PER_LONG, r(reg); \
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or r(sp), r(reg); \
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and $~(BYTES_PER_LONG-1),r(reg); \
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mov (r(reg)),r(reg);
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#define get_current(reg) GET_CURRENT(r(reg))
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#if defined(__x86_64__)
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#define r(reg) %r##reg
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@@ -106,6 +106,9 @@ void __dummy__(void)
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OFFSET(VCPUINFO_upcall_mask, vcpu_info_t, evtchn_upcall_mask);
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BLANK();
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OFFSET(CPUINFO_guest_cpu_user_regs, struct cpu_info, guest_cpu_user_regs);
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OFFSET(CPUINFO_processor_id, struct cpu_info, processor_id);
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OFFSET(CPUINFO_current_vcpu, struct cpu_info, current_vcpu);
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DEFINE(CPUINFO_sizeof, sizeof(struct cpu_info));
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BLANK();
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@@ -127,7 +130,7 @@ void __dummy__(void)
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DEFINE(IRQSTAT_shift, LOG_2(sizeof(irq_cpustat_t)));
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BLANK();
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OFFSET(CPUINFO_ext_features, struct cpuinfo_x86, x86_capability[1]);
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OFFSET(CPUINFO86_ext_features, struct cpuinfo_x86, x86_capability[1]);
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BLANK();
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OFFSET(MB_flags, multiboot_info_t, flags);
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@@ -61,17 +61,6 @@
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#include <asm/page.h>
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#include <public/xen.h>
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#define GET_GUEST_REGS(reg) \
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movl $~(STACK_SIZE-1),reg; \
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andl %esp,reg; \
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orl $(STACK_SIZE-CPUINFO_sizeof),reg;
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#define GET_CURRENT(reg) \
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movl $STACK_SIZE-4, reg; \
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orl %esp, reg; \
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andl $~3,reg; \
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movl (reg),reg;
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ALIGN
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restore_all_guest:
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ASSERT_INTERRUPTS_DISABLED
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@@ -590,7 +579,7 @@ handle_nmi_mce:
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jmp ret_from_intr
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.Lnmi_mce_xen:
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/* Check the outer (guest) context for %ds/%es state validity. */
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GET_GUEST_REGS(%ebx)
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GET_CPUINFO_FIELD(CPUINFO_guest_cpu_user_regs,%ebx)
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testl $X86_EFLAGS_VM,%ss:UREGS_eflags(%ebx)
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mov %ds,%eax
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mov %es,%edx
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@@ -132,6 +132,8 @@ void __dummy__(void)
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OFFSET(COMPAT_VCPUINFO_upcall_mask, struct compat_vcpu_info, evtchn_upcall_mask);
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BLANK();
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OFFSET(CPUINFO_guest_cpu_user_regs, struct cpu_info, guest_cpu_user_regs);
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OFFSET(CPUINFO_processor_id, struct cpu_info, processor_id);
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OFFSET(CPUINFO_current_vcpu, struct cpu_info, current_vcpu);
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DEFINE(CPUINFO_sizeof, sizeof(struct cpu_info));
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BLANK();
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@@ -151,7 +153,7 @@ void __dummy__(void)
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DEFINE(IRQSTAT_shift, LOG_2(sizeof(irq_cpustat_t)));
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BLANK();
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OFFSET(CPUINFO_ext_features, struct cpuinfo_x86, x86_capability[1]);
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OFFSET(CPUINFO86_ext_features, struct cpuinfo_x86, x86_capability[1]);
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BLANK();
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OFFSET(MB_flags, multiboot_info_t, flags);
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@@ -11,17 +11,6 @@
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#include <asm/desc.h>
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#include <public/xen.h>
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#define GET_GUEST_REGS(reg) \
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movq $~(STACK_SIZE-1),reg; \
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andq %rsp,reg; \
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orq $(STACK_SIZE-CPUINFO_sizeof),reg;
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#define GET_CURRENT(reg) \
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movq $STACK_SIZE-8, reg; \
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orq %rsp, reg; \
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andq $~7,reg; \
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movq (reg),reg;
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ALIGN
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ENTRY(compat_hypercall)
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pushq $0
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@@ -12,17 +12,6 @@
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#include <asm/page.h>
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#include <public/xen.h>
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#define GET_GUEST_REGS(reg) \
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movq $~(STACK_SIZE-1),reg; \
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andq %rsp,reg; \
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orq $(STACK_SIZE-CPUINFO_sizeof),reg;
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#define GET_CURRENT(reg) \
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movq $STACK_SIZE-8, reg; \
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orq %rsp, reg; \
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andq $~7,reg; \
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movq (reg),reg;
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ALIGN
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/* %rbx: struct vcpu */
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switch_to_kernel:
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@@ -434,10 +423,10 @@ domain_crash_synchronous_string:
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ENTRY(domain_crash_synchronous)
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# Get out of the guest-save area of the stack.
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GET_GUEST_REGS(%rax)
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GET_CPUINFO_FIELD(CPUINFO_guest_cpu_user_regs,%rax)
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movq %rax,%rsp
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# create_bounce_frame() temporarily clobbers CS.RPL. Fix up.
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movq CPUINFO_current_vcpu(%rax),%rax
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GET_CURRENT(%rax)
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movq VCPU_domain(%rax),%rax
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testb $1,DOMAIN_is_32bit_pv(%rax)
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setz %al
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@@ -610,7 +599,7 @@ handle_ist_exception:
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testb $3,UREGS_cs(%rsp)
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jz 1f
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/* Interrupted guest context. Copy the context to stack bottom. */
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GET_GUEST_REGS(%rdi)
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GET_CPUINFO_FIELD(CPUINFO_guest_cpu_user_regs,%rdi)
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movq %rsp,%rsi
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movl $UREGS_kernel_sizeof/8,%ecx
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movq %rdi,%rsp
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@@ -142,4 +142,12 @@ STR(IRQ) #nr "_interrupt:\n\t" \
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"pushl $"#nr"<<16\n\t" \
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"jmp common_interrupt");
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#define GET_CPUINFO_FIELD(field,reg) \
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movl $~(STACK_SIZE-1),reg; \
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andl %esp,reg; \
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orl $(STACK_SIZE-CPUINFO_sizeof+field),reg;
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#define GET_CURRENT(reg) \
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GET_CPUINFO_FIELD(CPUINFO_current_vcpu,reg) \
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movl (reg),reg;
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#endif /* __X86_32_ASM_DEFNS_H__ */
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@@ -122,4 +122,12 @@ STR(IRQ) #nr "_interrupt:\n\t" \
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"movl $"#nr",4(%rsp)\n\t" \
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"jmp common_interrupt");
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#define GET_CPUINFO_FIELD(field,reg) \
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movq $~(STACK_SIZE-1),reg; \
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andq %rsp,reg; \
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orq $(STACK_SIZE-CPUINFO_sizeof+field),reg;
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#define GET_CURRENT(reg) \
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GET_CPUINFO_FIELD(CPUINFO_current_vcpu,reg) \
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movq (reg),reg;
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#endif /* __X86_64_ASM_DEFNS_H__ */
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