diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index 7d6d0249e5..56a2331273 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -186,25 +186,6 @@ int get_cpu_vendor(uint32_t b, uint32_t c, uint32_t d, enum get_cpu_vendor mode) return X86_VENDOR_UNKNOWN; } -uint8_t get_cpu_family(uint32_t raw, uint8_t *model, uint8_t *stepping) -{ - uint8_t fam, mod; - - fam = (raw >> 8) & 0xf; - if (fam == 0xf) - fam += (raw >> 20) & 0xff; - - mod = (raw >> 4) & 0xf; - if (fam >= 0x6) - mod |= (raw >> 12) & 0xf0; - - if (model) - *model = mod; - if (stepping) - *stepping = raw & 0xf; - return fam; -} - static inline u32 _phys_pkg_id(u32 cpuid_apic, int index_msb) { return cpuid_apic >> index_msb; diff --git a/xen/arch/x86/domain.c b/xen/arch/x86/domain.c index 56669fccc7..354f3866a8 100644 --- a/xen/arch/x86/domain.c +++ b/xen/arch/x86/domain.c @@ -609,8 +609,6 @@ int arch_domain_create(struct domain *d, unsigned int domcr_flags, goto fail; d->arch.x86_vendor = boot_cpu_data.x86_vendor; - d->arch.x86 = boot_cpu_data.x86; - d->arch.x86_model = boot_cpu_data.x86_model; d->arch.ioport_caps = rangeset_new(d, "I/O Ports", RANGESETF_prettyprint_hex); diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 772c5d2970..0458d8f478 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -171,8 +171,6 @@ static int update_domain_cpuid_info(struct domain *d, } case 1: - d->arch.x86 = get_cpu_family(ctl->eax, &d->arch.x86_model, NULL); - if ( is_pv_domain(d) && ((levelling_caps & LCAP_1cd) == LCAP_1cd) ) { uint64_t mask = cpuidmask_defaults._1cd; diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index 2830f6ccca..8ad8465424 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -1125,7 +1125,7 @@ struct hvm_ioreq_server *hvm_select_ioreq_server(struct domain *d, (p->addr & ~3) == 0xcfc && CF8_ENABLED(cf8) ) { - uint32_t sbdf; + uint32_t sbdf, x86_fam; /* PCI config data cycle */ @@ -1141,7 +1141,9 @@ struct hvm_ioreq_server *hvm_select_ioreq_server(struct domain *d, /* AMD extended configuration space access? */ if ( CF8_ADDR_HI(cf8) && d->arch.x86_vendor == X86_VENDOR_AMD && - d->arch.x86 >= 0x10 && d->arch.x86 <= 0x17 ) + (x86_fam = get_cpu_family( + d->arch.cpuid->basic.raw_fms, NULL, NULL)) > 0x10 && + x86_fam <= 0x17 ) { uint64_t msr_val; diff --git a/xen/include/asm-x86/cpuid.h b/xen/include/asm-x86/cpuid.h index b359b38a2f..c56190b762 100644 --- a/xen/include/asm-x86/cpuid.h +++ b/xen/include/asm-x86/cpuid.h @@ -107,7 +107,7 @@ struct cpuid_policy uint32_t max_leaf, /* b */:32, /* c */:32, /* d */:32; /* Leaf 0x1 - Family/model/stepping and features. */ - uint32_t /* a */:32, /* b */:32; + uint32_t raw_fms, /* b */:32; union { uint32_t _1c; struct { DECL_BITFIELD(1c); }; diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h index eb6227d0ad..82296c8756 100644 --- a/xen/include/asm-x86/domain.h +++ b/xen/include/asm-x86/domain.h @@ -338,9 +338,7 @@ struct arch_domain bool_t auto_unmask; /* Values snooped from updates to cpuids[] (below). */ - u8 x86; /* CPU family */ u8 x86_vendor; /* CPU vendor */ - u8 x86_model; /* CPU model */ /* * The width of the FIP/FDP register in the FPU that needs to be diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h index b130f47103..3b859a59e1 100644 --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -625,7 +625,28 @@ enum get_cpu_vendor { }; int get_cpu_vendor(uint32_t b, uint32_t c, uint32_t d, enum get_cpu_vendor mode); -uint8_t get_cpu_family(uint32_t raw, uint8_t *model, uint8_t *stepping); + +static inline uint8_t get_cpu_family(uint32_t raw, uint8_t *model, + uint8_t *stepping) +{ + uint8_t fam = (raw >> 8) & 0xf; + + if ( fam == 0xf ) + fam += (raw >> 20) & 0xff; + + if ( model ) + { + uint8_t mod = (raw >> 4) & 0xf; + + if ( fam >= 0x6 ) + mod |= (raw >> 12) & 0xf0; + + *model = mod; + } + if ( stepping ) + *stepping = raw & 0xf; + return fam; +} #endif /* !__ASSEMBLY__ */