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honor ACPI v4 FADT flags
- force use of physical APIC mode if indicated so (as we don't support xAPIC cluster mode, the respective flag is taken to force physical mode too) - don't use MSI if indicated so (implies no IOMMU) Both can be overridden on the command line, for the MSI case this at once adds a new command line option allowing to turn off PCI MSI (IOMMU and HPET are unaffected by this). Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
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+49
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@@ -639,6 +639,13 @@ limit is ignored by Xen.
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Specify if the MMConfig space should be enabled.
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### msi
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> `= <boolean>`
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> Default: `true`
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Force Xen to (not) use PCI-MSI, even if ACPI FADT says otherwise.
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### mwait-idle
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> `= <boolean>`
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@@ -40,7 +40,14 @@ static struct dmi_system_id __initdata bigsmp_dmi_table[] = {
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static __init int probe_bigsmp(void)
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{
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if (!def_to_bigsmp)
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/*
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* We don't implement cluster mode, so force use of
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* physical mode in both cases.
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*/
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if (acpi_gbl_FADT.flags &
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(ACPI_FADT_APIC_CLUSTER | ACPI_FADT_APIC_PHYSICAL))
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def_to_bigsmp = 1;
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else if (!def_to_bigsmp)
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dmi_check_system(bigsmp_dmi_table);
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return def_to_bigsmp;
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}
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@@ -30,9 +30,6 @@
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#include <xen/smp.h>
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#include <asm/mach-default/mach_mpparse.h>
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static bool_t __initdata x2apic_phys; /* By default we use logical cluster mode. */
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boolean_param("x2apic_phys", x2apic_phys);
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static DEFINE_PER_CPU_READ_MOSTLY(u32, cpu_2_logical_apicid);
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static DEFINE_PER_CPU_READ_MOSTLY(cpumask_t *, cluster_cpus);
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static cpumask_t *cluster_cpus_spare;
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@@ -223,8 +220,14 @@ static struct notifier_block x2apic_cpu_nfb = {
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.notifier_call = update_clusterinfo
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};
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static s8 __initdata x2apic_phys = -1; /* By default we use logical cluster mode. */
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boolean_param("x2apic_phys", x2apic_phys);
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const struct genapic *__init apic_x2apic_probe(void)
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{
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if ( x2apic_phys < 0 )
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x2apic_phys = !!(acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL);
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if ( x2apic_phys )
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return &apic_x2apic_phys;
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@@ -381,6 +381,9 @@ static void __init hpet_fsb_cap_lookup(void)
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u32 id;
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unsigned int i, num_chs;
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if ( unlikely(acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) )
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return;
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id = hpet_read32(HPET_ID);
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num_chs = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
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+16
-2
@@ -32,6 +32,9 @@
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#include <xen/iommu.h>
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#include <xsm/xsm.h>
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static s8 __read_mostly use_msi = -1;
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boolean_param("msi", use_msi);
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/* bitmap indicate which fixed map is free */
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static DEFINE_SPINLOCK(msix_fixmap_lock);
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static DECLARE_BITMAP(msix_fixmap_pages, FIX_MSIX_MAX_PAGES);
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@@ -968,6 +971,9 @@ int pci_enable_msi(struct msi_info *msi, struct msi_desc **desc)
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{
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ASSERT(spin_is_locked(&pcidevs_lock));
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if ( !use_msi )
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return -EPERM;
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return msi->table_base ? __pci_enable_msix(msi, desc) :
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__pci_enable_msi(msi, desc);
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}
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@@ -1013,7 +1019,10 @@ int pci_restore_msi_state(struct pci_dev *pdev)
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ASSERT(spin_is_locked(&pcidevs_lock));
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if (!pdev)
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if ( !use_msi )
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return -EOPNOTSUPP;
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if ( !pdev )
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return -EINVAL;
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ret = xsm_resource_setup_pci(XSM_PRIV, (pdev->seg << 16) | (pdev->bus << 8) | pdev->devfn);
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@@ -1072,7 +1081,7 @@ unsigned int pci_msix_get_table_len(struct pci_dev *pdev)
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func = PCI_FUNC(pdev->devfn);
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pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSIX);
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if ( !pos )
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if ( !pos || !use_msi )
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return 0;
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control = pci_conf_read16(seg, bus, slot, func, msix_control_reg(pos));
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@@ -1109,6 +1118,11 @@ static struct notifier_block msi_cpu_nfb = {
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void __init early_msi_init(void)
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{
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if ( use_msi < 0 )
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use_msi = !(acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI);
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if ( !use_msi )
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return;
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register_cpu_notifier(&msi_cpu_nfb);
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if ( msi_cpu_callback(&msi_cpu_nfb, CPU_UP_PREPARE, NULL) &
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NOTIFY_STOP_MASK )
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@@ -1087,5 +1087,8 @@ int __init amd_iommu_get_ivrs_dev_entries(void)
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int __init amd_iommu_update_ivrs_mapping_acpi(void)
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{
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if ( unlikely(acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) )
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return -EPERM;
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return acpi_table_parse(ACPI_SIG_IVRS, parse_ivrs_table);
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}
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@@ -2115,6 +2115,12 @@ int __init intel_vtd_setup(void)
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goto error;
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}
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if ( unlikely(acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) )
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{
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ret = -EPERM;
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goto error;
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}
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platform_quirks_init();
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/* We enable the following features only if they are supported by all VT-d
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