x86/spec-ctrl: Enable Zen2 chickenbit

... as instructed in the Branch Type Confusion whitepaper.

This is part of XSA-407.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
Andrew Cooper committed 2022-07-12 16:23:00 +01:00
1 parent 76cb04ad64
commit 9deaf2d932
4 files changed
+36

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+28
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@@ -731,6 +731,31 @@ void amd_init_ssbd(const struct cpuinfo_x86 *c)
printk_once(XENLOG_ERR "No SSBD controls available\n");
}
/*
* On Zen2 we offer this chicken (bit) on the altar of Speculation.
*
* Refer to the AMD Branch Type Confusion whitepaper:
* https://XXX
*
* Setting this unnamed bit supposedly causes prediction information on
* non-branch instructions to be ignored. It is to be set unilaterally in
* newer microcode.
*
* This chickenbit is something unrelated on Zen1, and Zen1 vs Zen2 isn't a
* simple model number comparison, so use STIBP as a heuristic to separate the
* two uarches in Fam17h(AMD)/18h(Hygon).
*/
void amd_init_spectral_chicken(void)
{
uint64_t val, chickenbit = 1 << 1;
if (cpu_has_hypervisor || !boot_cpu_has(X86_FEATURE_AMD_STIBP))
return;
if (rdmsr_safe(MSR_AMD64_DE_CFG2, val) == 0 && !(val & chickenbit))
wrmsr_safe(MSR_AMD64_DE_CFG2, val | chickenbit);
}
void __init detect_zen2_null_seg_behaviour(void)
{
uint64_t base;
@@ -796,6 +821,9 @@ static void cf_check init_amd(struct cpuinfo_x86 *c)
amd_init_ssbd(c);
if (c->x86 == 0x17)
amd_init_spectral_chicken();
/* Probe for NSCB on Zen2 CPUs when not virtualised */
if (!cpu_has_hypervisor && !cpu_has_nscb && c == &boot_cpu_data &&
c->x86 == 0x17)
+1
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@@ -22,4 +22,5 @@ void cf_check early_init_amd(struct cpuinfo_x86 *c);
void amd_log_freq(const struct cpuinfo_x86 *c);
void amd_init_lfence(struct cpuinfo_x86 *c);
void amd_init_ssbd(const struct cpuinfo_x86 *c);
void amd_init_spectral_chicken(void);
void detect_zen2_null_seg_behaviour(void);
+6
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@@ -40,6 +40,12 @@ static void cf_check init_hygon(struct cpuinfo_x86 *c)
c->x86 == 0x18)
detect_zen2_null_seg_behaviour();
/*
* TODO: Check heuristic safety with Hygon first
if (c->x86 == 0x18)
amd_init_spectral_chicken();
*/
/*
* Hygon CPUs before Zen2 don't clear segment bases/limits when
* loading a NULL selector.
+1
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@@ -377,6 +377,7 @@
#define MSR_AMD64_DE_CFG 0xc0011029
#define AMD64_DE_CFG_LFENCE_SERIALISE (_AC(1, ULL) << 1)
#define MSR_AMD64_EX_CFG 0xc001102c
#define MSR_AMD64_DE_CFG2 0xc00110e3
#define MSR_AMD64_DR0_ADDRESS_MASK 0xc0011027
#define MSR_AMD64_DR1_ADDRESS_MASK 0xc0011019
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