From 9e2c146c38a74e6ced610599224ce216cae13874 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Thu, 2 Nov 2023 10:44:11 +0100 Subject: [PATCH] x86: don't allow Dom0 access to port 92 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Somewhat like port CF9 this may have a bit controlling the CPU's INIT# signal, and it also may have a bit involved in the driving of A20M#. Neither of these - just like CF9 - we want to allow Dom0 to drive. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- xen/arch/x86/dom0_build.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 5dc5872e38..c31afc734f 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -488,6 +488,10 @@ int __init dom0_setup_permissions(struct domain *d) rc |= ioports_deny_access(d, 0x40, 0x43); /* PIT Channel 2 / PC Speaker Control. */ rc |= ioports_deny_access(d, 0x61, 0x61); + + /* INIT# and alternative A20M# control. */ + rc |= ioports_deny_access(d, 0x92, 0x92); + /* ACPI PM Timer. */ if ( pmtmr_ioport ) rc |= ioports_deny_access(d, pmtmr_ioport, pmtmr_ioport + 3);