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AMD/IOMMU: don't needlessly trigger errors/crashes when unmapping a page
Unmapping a page which has never been mapped should be a no-op (note how it already is in case there was no root page table allocated). There's in particular no need to grow the number of page table levels in use, and there's also no need to allocate intermediate page tables except when needing to split a large page. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Paul Durrant <paul@xen.org> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> Release-acked-by: Juergen Gross <jgross@suse.com>
This commit is contained in:
1 parent
dedcb1087d
commit
ad591454f0
1 file changed
+18
-22
@@ -176,7 +176,7 @@ void iommu_dte_set_guest_cr3(struct amd_iommu_dte *dte, uint16_t dom_id,
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* page tables.
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*/
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static int iommu_pde_from_dfn(struct domain *d, unsigned long dfn,
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unsigned long pt_mfn[])
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unsigned long pt_mfn[], bool map)
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{
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struct amd_iommu_pte *pde, *next_table_vaddr;
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unsigned long next_table_mfn;
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@@ -189,6 +189,13 @@ static int iommu_pde_from_dfn(struct domain *d, unsigned long dfn,
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BUG_ON( table == NULL || level < 1 || level > 6 );
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/*
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* A frame number past what the current page tables can represent can't
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* possibly have a mapping.
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*/
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if ( dfn >> (PTE_PER_TABLE_SHIFT * level) )
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return 0;
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next_table_mfn = mfn_x(page_to_mfn(table));
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if ( level == 1 )
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@@ -246,6 +253,9 @@ static int iommu_pde_from_dfn(struct domain *d, unsigned long dfn,
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/* Install lower level page table for non-present entries */
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else if ( !pde->pr )
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{
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if ( !map )
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return 0;
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if ( next_table_mfn == 0 )
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{
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table = alloc_amd_iommu_pgtable();
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@@ -404,7 +414,7 @@ int amd_iommu_map_page(struct domain *d, dfn_t dfn, mfn_t mfn,
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}
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}
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if ( iommu_pde_from_dfn(d, dfn_x(dfn), pt_mfn) || (pt_mfn[1] == 0) )
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if ( iommu_pde_from_dfn(d, dfn_x(dfn), pt_mfn, true) || (pt_mfn[1] == 0) )
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{
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spin_unlock(&hd->arch.mapping_lock);
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AMD_IOMMU_DEBUG("Invalid IO pagetable entry dfn = %"PRI_dfn"\n",
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@@ -439,24 +449,7 @@ int amd_iommu_unmap_page(struct domain *d, dfn_t dfn,
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return 0;
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}
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/* Since HVM domain is initialized with 2 level IO page table,
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* we might need a deeper page table for lager dfn now */
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if ( is_hvm_domain(d) )
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{
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int rc = update_paging_mode(d, dfn_x(dfn));
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if ( rc )
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{
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spin_unlock(&hd->arch.mapping_lock);
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AMD_IOMMU_DEBUG("Update page mode failed dfn = %"PRI_dfn"\n",
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dfn_x(dfn));
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if ( rc != -EADDRNOTAVAIL )
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domain_crash(d);
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return rc;
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}
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}
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if ( iommu_pde_from_dfn(d, dfn_x(dfn), pt_mfn) || (pt_mfn[1] == 0) )
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if ( iommu_pde_from_dfn(d, dfn_x(dfn), pt_mfn, false) )
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{
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spin_unlock(&hd->arch.mapping_lock);
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AMD_IOMMU_DEBUG("Invalid IO pagetable entry dfn = %"PRI_dfn"\n",
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@@ -465,8 +458,11 @@ int amd_iommu_unmap_page(struct domain *d, dfn_t dfn,
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return -EFAULT;
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}
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/* mark PTE as 'page not present' */
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*flush_flags |= clear_iommu_pte_present(pt_mfn[1], dfn_x(dfn));
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if ( pt_mfn[1] )
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{
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/* Mark PTE as 'page not present'. */
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*flush_flags |= clear_iommu_pte_present(pt_mfn[1], dfn_x(dfn));
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}
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spin_unlock(&hd->arch.mapping_lock);
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