x86/mm/p2m: break into common, pt-implementation and pod parts.

Start to make a clearer distinction between generic p2m functions and
the implementation of the datastructure as an x86 pagetable.
Also move the EPT datastructure implementation into x86/mm/ to match,
and split the PoD admin code into its own file.

This is just code motion, except for splitting the p2m_initialise
function into a pt-specific part and a common part.

Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>

xen/arch/x86/mm/Makefile

@@ -2,7 +2,7 @@ subdir-y += shadow
 subdir-y += hap
 
 obj-y += paging.o
-obj-y += p2m.o
+obj-y += p2m.o p2m-pt.o p2m-ept.o p2m-pod.o
 obj-y += guest_walk_2.o
 obj-y += guest_walk_3.o
 obj-$(x86_64) += guest_walk_4.o

xen/arch/x86/mm/hap/Makefile

@@ -2,7 +2,6 @@ obj-y += hap.o
 obj-y += guest_walk_2level.o
 obj-y += guest_walk_3level.o
 obj-$(x86_64) += guest_walk_4level.o
-obj-y += p2m-ept.o
 obj-y += nested_hap.o
 
 guest_walk_%level.o: guest_walk.c Makefile

xen/arch/x86/mm/p2m-ept.c

@@ -820,9 +820,8 @@ static void ept_change_entry_type_global(struct p2m_domain *p2m,
     ept_sync_domain(d);
 }
 
-void ept_p2m_init(struct domain *d)
+void ept_p2m_init(struct p2m_domain *p2m)
 {
-    struct p2m_domain *p2m = p2m_get_hostp2m(d);
     p2m->set_entry = ept_set_entry;
     p2m->get_entry = ept_get_entry;
     p2m->get_entry_current = ept_get_entry_current;

xen/include/asm-x86/hvm/vmx/vmx.h

@@ -399,7 +399,7 @@ void vmx_inject_hw_exception(int trap, int error_code);
 void vmx_inject_extint(int trap);
 void vmx_inject_nmi(void);
 
-void ept_p2m_init(struct domain *d);
+void ept_p2m_init(struct p2m_domain *p2m);
 void ept_walk_table(struct domain *d, unsigned long gfn);
 void setup_ept_dump(void);
 

xen/include/asm-x86/p2m.h

@@ -638,6 +638,34 @@ static inline void p2m_mem_access_check(unsigned long gpa, bool_t gla_valid,
 struct page_info *p2m_alloc_ptp(struct p2m_domain *p2m, unsigned long type);
 void p2m_free_ptp(struct p2m_domain *p2m, struct page_info *pg);
 
+#if CONFIG_PAGING_LEVELS == 3
+static inline int p2m_gfn_check_limit(
+    struct domain *d, unsigned long gfn, unsigned int order)
+{
+    /*
+     * 32bit AMD nested paging does not support over 4GB guest due to 
+     * hardware translation limit. This limitation is checked by comparing
+     * gfn with 0xfffffUL.
+     */
+    if ( !hap_enabled(d) || ((gfn + (1ul << order)) <= 0x100000UL) ||
+         (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) )
+        return 0;
+
+    if ( !test_and_set_bool(d->arch.hvm_domain.svm.npt_4gb_warning) )
+        dprintk(XENLOG_WARNING, "Dom%d failed to populate memory beyond"
+                " 4GB: specify 'hap=0' domain config option.\n",
+                d->domain_id);
+
+    return -EINVAL;
+}
+#else
+#define p2m_gfn_check_limit(d, g, o) 0
+#endif
+
+/* Directly set a p2m entry: only for use by p2m code */
+int set_p2m_entry(struct p2m_domain *p2m, unsigned long gfn, mfn_t mfn, 
+                  unsigned int page_order, p2m_type_t p2mt, p2m_access_t p2ma);
+
 #endif /* _XEN_P2M_H */
 
 /*