From b6f399b341fc3ddf528a31f520819e572f3f6835 Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Fri, 5 Dec 2025 18:28:53 +0000 Subject: [PATCH] x86: Misra fixes for U/L suffixes With the wider testing, some more violations have been spotted. This addresses violations of Rule 7.2 (suffixes required) and Rule 7.3 (L must be uppercase). No functional change. Signed-off-by: Andrew Cooper Reviewed-by: Nicola Vetrini --- xen/arch/x86/mm/shadow/common.c | 4 ++-- xen/arch/x86/pv/descriptor-tables.c | 2 +- xen/arch/x86/pv/emulate.c | 2 +- xen/drivers/passthrough/vtd/iommu.h | 2 +- xen/include/xen/elfstructs.h | 2 +- xen/include/xen/sizes.h | 2 +- 6 files changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index 0176e33bc9..423764a326 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -1961,7 +1961,7 @@ int sh_remove_write_access(struct domain *d, mfn_t gmfn, /* FreeBSD 64bit: linear map 0xffff800000000000 */ switch ( level ) { - case 1: GUESS(0xffff800000000000 + case 1: GUESS(0xffff800000000000UL + ((fault_addr & VADDR_MASK) >> 9), 6); break; case 2: GUESS(0xffff804000000000UL + ((fault_addr & VADDR_MASK) >> 18), 6); break; @@ -1969,7 +1969,7 @@ int sh_remove_write_access(struct domain *d, mfn_t gmfn, + ((fault_addr & VADDR_MASK) >> 27), 6); break; } /* FreeBSD 64bit: direct map at 0xffffff0000000000 */ - GUESS(0xffffff0000000000 + gfn_to_gaddr(gfn), 6); + GUESS(0xffffff0000000000UL + gfn_to_gaddr(gfn), 6); } #undef GUESS diff --git a/xen/arch/x86/pv/descriptor-tables.c b/xen/arch/x86/pv/descriptor-tables.c index 02647a2c50..26f7d18b11 100644 --- a/xen/arch/x86/pv/descriptor-tables.c +++ b/xen/arch/x86/pv/descriptor-tables.c @@ -216,7 +216,7 @@ static bool check_descriptor(const struct domain *dom, seg_desc_t *d) * 0xf6800000. Extend these to allow access to the larger read-only * M2P table available in 32on64 mode. */ - base = (b & 0xff000000) | ((b & 0xff) << 16) | (a >> 16); + base = (b & 0xff000000U) | ((b & 0xff) << 16) | (a >> 16); limit = (b & 0xf0000) | (a & 0xffff); limit++; /* We add one because limit is inclusive. */ diff --git a/xen/arch/x86/pv/emulate.c b/xen/arch/x86/pv/emulate.c index 8c44dea123..e741e686c1 100644 --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -37,7 +37,7 @@ int pv_emul_read_descriptor(unsigned int sel, const struct vcpu *v, if ( !(desc.b & _SEGMENT_L) ) { *base = ((desc.a >> 16) + ((desc.b & 0xff) << 16) + - (desc.b & 0xff000000)); + (desc.b & 0xff000000U)); *limit = (desc.a & 0xffff) | (desc.b & 0x000f0000); if ( desc.b & _SEGMENT_G ) *limit = ((*limit + 1) << 12) - 1; diff --git a/xen/drivers/passthrough/vtd/iommu.h b/xen/drivers/passthrough/vtd/iommu.h index 29d350b23d..4f41360c53 100644 --- a/xen/drivers/passthrough/vtd/iommu.h +++ b/xen/drivers/passthrough/vtd/iommu.h @@ -266,7 +266,7 @@ struct dma_pte { #define DMA_PTE_PROT (DMA_PTE_READ | DMA_PTE_WRITE) #define DMA_PTE_SP (1 << 7) #define DMA_PTE_SNP (1 << 11) -#define DMA_PTE_CONTIG_MASK (0xfull << PADDR_BITS) +#define DMA_PTE_CONTIG_MASK (0xfULL << PADDR_BITS) #define dma_clear_pte(p) do {(p).val = 0;} while(0) #define dma_set_pte_readable(p) do {(p).val |= DMA_PTE_READ;} while(0) #define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while(0) diff --git a/xen/include/xen/elfstructs.h b/xen/include/xen/elfstructs.h index eb6b87a823..62225bb8a0 100644 --- a/xen/include/xen/elfstructs.h +++ b/xen/include/xen/elfstructs.h @@ -360,7 +360,7 @@ typedef struct { } Elf64_Rela; #define ELF64_R_SYM(info) ((info) >> 32) -#define ELF64_R_TYPE(info) ((info) & 0xFFFFFFFF) +#define ELF64_R_TYPE(info) ((info) & 0xFFFFFFFFU) #define ELF64_R_INFO(s,t) (((s) << 32) + (uint32_t)(t)) /* diff --git a/xen/include/xen/sizes.h b/xen/include/xen/sizes.h index f7b728ddab..d309ebf044 100644 --- a/xen/include/xen/sizes.h +++ b/xen/include/xen/sizes.h @@ -43,6 +43,6 @@ #define SZ_512M 0x20000000 #define SZ_1G 0x40000000 -#define SZ_2G 0x80000000 +#define SZ_2G 0x80000000U #endif /* __XEN_SIZES_H__ */