From b8da9cd050fc33d45404bc9e4c5eb95f9c9181c8 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Wed, 18 Jan 2017 10:24:51 +0100 Subject: [PATCH] x86emul: CMPXCHG16B requires an aligned operand This distinguishes it from CMPXCHG8B. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper master commit: d7d3a82c28a1102ee6c9707071a946164bae0d57 master date: 2016-12-16 14:37:11 +0100 --- xen/arch/x86/x86_emulate/x86_emulate.c | 27 ++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index a46b0a9ec5..300ee57371 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -1403,6 +1403,30 @@ decode_register( return p; } +static bool_t is_aligned(enum x86_segment seg, unsigned long offs, + unsigned int size, struct x86_emulate_ctxt *ctxt, + const struct x86_emulate_ops *ops) +{ + struct segment_register reg; + + /* Expecting powers of two only. */ + ASSERT(!(size & (size - 1))); + + if ( mode_64bit() && seg < x86_seg_fs ) + memset(®, 0, sizeof(reg)); + else + { + /* No alignment checking when we have no way to read segment data. */ + if ( !ops->read_segment ) + return 1; + + if ( ops->read_segment(seg, ®, ctxt) != X86EMUL_OKAY ) + return 0; + } + + return !((reg.base + offs) & (size - 1)); +} + /* Inject a software interrupt/exception, emulating if needed. */ static int inject_swint(enum x86_swint_type type, uint8_t vector, uint8_t insn_len, @@ -4755,6 +4779,9 @@ x86_emulate( if ( op_bytes == 8 ) { vcpu_must_have_cx16(); + generate_exception_if(!is_aligned(ea.mem.seg, ea.mem.off, 16, + ctxt, ops), + EXC_GP, 0); op_bytes = 16; } else