From bc24cc6b723627ec3e136ad38770c119e45f70df Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Fri, 11 Sep 2026 08:53:58 +0200 Subject: [PATCH] x86/HVM: address Misra 2.1 rule violations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In hvm_set_cr3() the "bad_cr3" label is reachable only with SHADOW_PAGING=y; the code being there is therefore a Misra rule 2.1 (unreachable code) violation when SHADOW_PAGING=n. Similarly code past the initial switch() in hvm_debug_op() is reachable only when CONFIG_INTEL_VMX=y. No functional change. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- xen/arch/x86/hvm/hvm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 9a4147b62e..28f11a5292 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -2455,6 +2455,7 @@ int hvm_set_cr3(unsigned long value, bool noflush, bool may_defer) return X86EMUL_OKAY; bad_cr3: + BUILD_ERROR_IF_NOT(CONFIG_SHADOW_PAGING); gdprintk(XENLOG_ERR, "Invalid CR3\n"); domain_crash(currd); return X86EMUL_UNHANDLEABLE; @@ -5201,6 +5202,8 @@ int hvm_debug_op(struct vcpu *v, int32_t op) return -ENOSYS; } + BUILD_ERROR_IF_NOT(CONFIG_INTEL_VMX); + vcpu_pause(v); switch ( op )