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x86: microcode update support for AMD CPUs
Microcode update support for AMD CPUs Family10h and Family11h. It is based on a patch for Linux which is on its way for 2.6.28. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
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@@ -28,6 +28,8 @@ obj-y += msi.o
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obj-y += ioport_emulate.o
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obj-y += irq.o
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obj-y += microcode.o
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obj-y += microcode_amd.o
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obj-y += microcode_intel.o
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obj-y += mm.o
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obj-y += mpparse.o
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obj-y += nmi.o
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+194
-404
@@ -1,72 +1,73 @@
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/*
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* Intel CPU Microcode Update Driver for Linux
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* Intel CPU Microcode Update Driver for Linux
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*
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* Copyright (C) 2000-2004 Tigran Aivazian
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* Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
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* 2006 Shaohua Li <shaohua.li@intel.com> *
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* This driver allows to upgrade microcode on Intel processors
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* belonging to IA-32 family - PentiumPro, Pentium II,
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* Pentium III, Xeon, Pentium 4, etc.
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*
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* This driver allows to upgrade microcode on Intel processors
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* belonging to IA-32 family - PentiumPro, Pentium II,
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* Pentium III, Xeon, Pentium 4, etc.
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* Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
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* Software Developer's Manual
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* Order Number 253668 or free download from:
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*
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* Reference: Section 8.10 of Volume III, Intel Pentium 4 Manual,
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* Order Number 245472 or free download from:
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*
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* http://developer.intel.com/design/pentium4/manuals/245472.htm
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* http://developer.intel.com/design/pentium4/manuals/253668.htm
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*
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* For more information, go to http://www.urbanmyth.org/microcode
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* For more information, go to http://www.urbanmyth.org/microcode
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
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* Initial release.
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* 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
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* Added read() support + cleanups.
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* 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
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* Added 'device trimming' support. open(O_WRONLY) zeroes
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* and frees the saved copy of applied microcode.
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* 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
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* Made to use devfs (/dev/cpu/microcode) + cleanups.
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* 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
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* Added misc device support (now uses both devfs and misc).
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* Added MICROCODE_IOCFREE ioctl to clear memory.
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* 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
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* Messages for error cases (non Intel & no suitable microcode).
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* 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
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* Removed ->release(). Removed exclusive open and status bitmap.
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* Added microcode_rwsem to serialize read()/write()/ioctl().
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* Removed global kernel lock usage.
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* 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
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* Write 0 to 0x8B msr and then cpuid before reading revision,
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* so that it works even if there were no update done by the
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* BIOS. Otherwise, reading from 0x8B gives junk (which happened
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* to be 0 on my machine which is why it worked even when I
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* disabled update by the BIOS)
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* Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
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* 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
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* Tigran Aivazian <tigran@veritas.com>
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* Intel Pentium 4 processor support and bugfixes.
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* 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
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* Bugfix for HT (Hyper-Threading) enabled processors
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* whereby processor resources are shared by all logical processors
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* in a single CPU package.
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* 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
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* Tigran Aivazian <tigran@veritas.com>,
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* Serialize updates as required on HT processors due to speculative
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* nature of implementation.
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* 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
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* Fix the panic when writing zero-length microcode chunk.
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* 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
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* Jun Nakajima <jun.nakajima@intel.com>
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* Support for the microcode updates in the new format.
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* 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
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* Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
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* because we no longer hold a copy of applied microcode
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* in kernel memory.
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* 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
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* Fix sigmatch() macro to handle old CPUs with pf == 0.
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* Thanks to Stuart Swales for pointing out this bug.
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* 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
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* Initial release.
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* 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
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* Added read() support + cleanups.
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* 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
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* Added 'device trimming' support. open(O_WRONLY) zeroes
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* and frees the saved copy of applied microcode.
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* 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
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* Made to use devfs (/dev/cpu/microcode) + cleanups.
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* 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
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* Added misc device support (now uses both devfs and misc).
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* Added MICROCODE_IOCFREE ioctl to clear memory.
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* 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
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* Messages for error cases (non Intel & no suitable microcode).
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* 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
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* Removed ->release(). Removed exclusive open and status bitmap.
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* Added microcode_rwsem to serialize read()/write()/ioctl().
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* Removed global kernel lock usage.
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* 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
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* Write 0 to 0x8B msr and then cpuid before reading revision,
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* so that it works even if there were no update done by the
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* BIOS. Otherwise, reading from 0x8B gives junk (which happened
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* to be 0 on my machine which is why it worked even when I
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* disabled update by the BIOS)
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* Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
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* 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
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* Tigran Aivazian <tigran@veritas.com>
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* Intel Pentium 4 processor support and bugfixes.
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* 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
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* Bugfix for HT (Hyper-Threading) enabled processors
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* whereby processor resources are shared by all logical processors
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* in a single CPU package.
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* 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
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* Tigran Aivazian <tigran@veritas.com>,
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* Serialize updates as required on HT processors due to
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* speculative nature of implementation.
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* 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
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* Fix the panic when writing zero-length microcode chunk.
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* 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
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* Jun Nakajima <jun.nakajima@intel.com>
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* Support for the microcode updates in the new format.
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* 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
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* Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
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* because we no longer hold a copy of applied microcode
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* in kernel memory.
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* 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
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* Fix sigmatch() macro to handle old CPUs with pf == 0.
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* Thanks to Stuart Swales for pointing out this bug.
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*/
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#include <xen/config.h>
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@@ -76,381 +77,144 @@
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#include <xen/sched.h>
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#include <xen/smp.h>
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#include <xen/spinlock.h>
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#include <xen/guest_access.h>
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#include <asm/current.h>
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#include <asm/msr.h>
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#include <asm/uaccess.h>
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#include <asm/processor.h>
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#define pr_debug(x...) ((void)0)
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#define DEFINE_MUTEX(_m) DEFINE_SPINLOCK(_m)
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#define mutex_lock(_m) spin_lock(_m)
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#define mutex_unlock(_m) spin_unlock(_m)
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#define vmalloc(_s) xmalloc_bytes(_s)
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#define vfree(_p) xfree(_p)
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#if 0
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MODULE_DESCRIPTION("Intel CPU (IA-32) Microcode Update Driver");
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MODULE_AUTHOR("Tigran Aivazian <tigran@veritas.com>");
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MODULE_LICENSE("GPL");
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#endif
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#include <asm/microcode.h>
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static int verbose;
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boolean_param("microcode.verbose", verbose);
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#define MICROCODE_VERSION "1.14a"
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const struct microcode_ops *microcode_ops;
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#define DEFAULT_UCODE_DATASIZE (2000) /* 2000 bytes */
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#define MC_HEADER_SIZE (sizeof (microcode_header_t)) /* 48 bytes */
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#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE) /* 2048 bytes */
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#define EXT_HEADER_SIZE (sizeof (struct extended_sigtable)) /* 20 bytes */
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#define EXT_SIGNATURE_SIZE (sizeof (struct extended_signature)) /* 12 bytes */
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#define DWSIZE (sizeof (u32))
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#define get_totalsize(mc) \
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(((microcode_t *)mc)->hdr.totalsize ? \
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((microcode_t *)mc)->hdr.totalsize : DEFAULT_UCODE_TOTALSIZE)
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#define get_datasize(mc) \
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(((microcode_t *)mc)->hdr.datasize ? \
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((microcode_t *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
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static DEFINE_SPINLOCK(microcode_mutex);
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#define sigmatch(s1, s2, p1, p2) \
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(((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
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struct ucode_cpu_info ucode_cpu_info[NR_CPUS];
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#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
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struct microcode_buffer {
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void *buf;
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size_t size;
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};
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/* serialize access to the physical write to MSR 0x79 */
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static DEFINE_SPINLOCK(microcode_update_lock);
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static struct microcode_buffer microcode_buffer;
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static bool_t microcode_error;
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/* no concurrent ->write()s are allowed on /dev/cpu/microcode */
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static DEFINE_MUTEX(microcode_mutex);
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static const void __user *user_buffer; /* user area microcode data buffer */
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static unsigned int user_buffer_size; /* it's size */
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typedef enum mc_error_code {
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MC_SUCCESS = 0,
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MC_IGNORED = 1,
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MC_NOTFOUND = 2,
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MC_MARKED = 3,
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MC_ALLOCATED = 4,
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} mc_error_code_t;
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static struct ucode_cpu_info {
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unsigned int sig;
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unsigned int pf, orig_pf;
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unsigned int rev;
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unsigned int cksum;
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mc_error_code_t err;
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microcode_t *mc;
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} ucode_cpu_info[NR_CPUS];
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static void collect_cpu_info (void *unused)
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static void microcode_fini_cpu(int cpu)
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{
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int cpu_num = smp_processor_id();
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struct cpuinfo_x86 *c = cpu_data + cpu_num;
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
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unsigned int val[2];
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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uci->sig = uci->pf = uci->rev = uci->cksum = 0;
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uci->err = MC_NOTFOUND;
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uci->mc = NULL;
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spin_lock(µcode_mutex);
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microcode_ops->microcode_fini_cpu(cpu);
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uci->valid = 0;
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spin_unlock(µcode_mutex);
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}
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if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
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cpu_has(c, X86_FEATURE_IA64)) {
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printk(KERN_ERR "microcode: CPU%d not a capable Intel processor\n", cpu_num);
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return;
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static int collect_cpu_info(int cpu)
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{
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int err = 0;
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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memset(uci, 0, sizeof(*uci));
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err = microcode_ops->collect_cpu_info(cpu, &uci->cpu_sig);
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if (!err)
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uci->valid = 1;
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return err;
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}
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static int microcode_resume_cpu(int cpu)
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{
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int err = 0;
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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struct cpu_signature nsig;
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gdprintk(XENLOG_INFO, "microcode: CPU%d resumed\n", cpu);
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if (!uci->mc.valid_mc)
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return -EIO;
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/*
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* Let's verify that the 'cached' ucode does belong
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* to this cpu (a bit of paranoia):
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*/
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err = microcode_ops->collect_cpu_info(cpu, &nsig);
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if (err) {
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microcode_fini_cpu(cpu);
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return err;
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}
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if (memcmp(&nsig, &uci->cpu_sig, sizeof(nsig))) {
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microcode_fini_cpu(cpu);
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/* Should we look for a new ucode here? */
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return -EIO;
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}
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err = microcode_ops->apply_microcode(cpu);
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return err;
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}
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static int microcode_update_cpu(int cpu, const void *buf, size_t size)
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{
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int err = 0;
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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/* We should bind the task to the CPU */
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BUG_ON(raw_smp_processor_id() != cpu);
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spin_lock(µcode_mutex);
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/*
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* Check if the system resume is in progress (uci->valid != NULL),
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* otherwise just request a firmware:
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*/
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if (uci->valid) {
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err = microcode_resume_cpu(cpu);
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} else {
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uci->sig = cpuid_eax(0x00000001);
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if ((c->x86_model >= 5) || (c->x86 > 6)) {
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/* get processor flags from MSR 0x17 */
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rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
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uci->pf = 1 << ((val[1] >> 18) & 7);
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}
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uci->orig_pf = uci->pf;
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}
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wrmsr(MSR_IA32_UCODE_REV, 0, 0);
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/* see notes above for revision 1.07. Apparent chip bug */
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sync_core();
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/* get the current revision from MSR 0x8B */
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rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
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pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
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uci->sig, uci->pf, uci->rev);
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}
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static inline void mark_microcode_update (int cpu_num, microcode_header_t *mc_header, int sig, int pf, int cksum)
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{
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
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pr_debug("Microcode Found.\n");
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pr_debug(" Header Revision 0x%x\n", mc_header->hdrver);
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pr_debug(" Loader Revision 0x%x\n", mc_header->ldrver);
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pr_debug(" Revision 0x%x \n", mc_header->rev);
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pr_debug(" Date %x/%x/%x\n",
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((mc_header->date >> 24 ) & 0xff),
|
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((mc_header->date >> 16 ) & 0xff),
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(mc_header->date & 0xFFFF));
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pr_debug(" Signature 0x%x\n", sig);
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pr_debug(" Type 0x%x Family 0x%x Model 0x%x Stepping 0x%x\n",
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((sig >> 12) & 0x3),
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((sig >> 8) & 0xf),
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((sig >> 4) & 0xf),
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((sig & 0xf)));
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pr_debug(" Processor Flags 0x%x\n", pf);
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pr_debug(" Checksum 0x%x\n", cksum);
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if (mc_header->rev < uci->rev) {
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if (uci->err == MC_NOTFOUND) {
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uci->err = MC_IGNORED;
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uci->cksum = mc_header->rev;
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} else if (uci->err == MC_IGNORED && uci->cksum < mc_header->rev)
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uci->cksum = mc_header->rev;
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} else if (mc_header->rev == uci->rev) {
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if (uci->err < MC_MARKED) {
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/* notify the caller of success on this cpu */
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uci->err = MC_SUCCESS;
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}
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} else if (uci->err != MC_ALLOCATED || mc_header->rev > uci->mc->hdr.rev) {
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pr_debug("microcode: CPU%d found a matching microcode update with "
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" revision 0x%x (current=0x%x)\n", cpu_num, mc_header->rev, uci->rev);
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uci->cksum = cksum;
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uci->pf = pf; /* keep the original mc pf for cksum calculation */
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uci->err = MC_MARKED; /* found the match */
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for_each_online_cpu(cpu_num) {
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if (ucode_cpu_info + cpu_num != uci
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&& ucode_cpu_info[cpu_num].mc == uci->mc) {
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uci->mc = NULL;
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break;
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}
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}
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if (uci->mc != NULL) {
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vfree(uci->mc);
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uci->mc = NULL;
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err = collect_cpu_info(cpu);
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if (err)
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goto out;
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if (uci->valid) {
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err = microcode_ops->cpu_request_microcode(cpu, buf, size);
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}
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}
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return;
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||||
out:
|
||||
spin_unlock(µcode_mutex);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int find_matching_ucodes (void)
|
||||
static void do_microcode_update_one(void *info)
|
||||
{
|
||||
int cursor = 0;
|
||||
int error = 0;
|
||||
|
||||
while (cursor + MC_HEADER_SIZE < user_buffer_size) {
|
||||
microcode_header_t mc_header;
|
||||
void *newmc = NULL;
|
||||
int i, sum, cpu_num, allocated_flag, total_size, data_size, ext_table_size;
|
||||
error = microcode_update_cpu(smp_processor_id(),
|
||||
microcode_buffer.buf, microcode_buffer.size);
|
||||
|
||||
if (copy_from_user(&mc_header, user_buffer + cursor, MC_HEADER_SIZE)) {
|
||||
printk(KERN_ERR "microcode: error! Can not read user data\n");
|
||||
error = -EFAULT;
|
||||
goto out;
|
||||
}
|
||||
|
||||
total_size = get_totalsize(&mc_header);
|
||||
if (cursor + total_size > user_buffer_size) {
|
||||
printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
data_size = get_datasize(&mc_header);
|
||||
if (data_size + MC_HEADER_SIZE > total_size) {
|
||||
printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (mc_header.ldrver != 1 || mc_header.hdrver != 1) {
|
||||
printk(KERN_ERR "microcode: error! Unknown microcode update format\n");
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
for_each_online_cpu(cpu_num) {
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
|
||||
|
||||
if (sigmatch(mc_header.sig, uci->sig, mc_header.pf, uci->orig_pf))
|
||||
mark_microcode_update(cpu_num, &mc_header, mc_header.sig, mc_header.pf, mc_header.cksum);
|
||||
}
|
||||
|
||||
ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
|
||||
if (ext_table_size) {
|
||||
struct extended_sigtable ext_header;
|
||||
struct extended_signature ext_sig;
|
||||
int ext_sigcount;
|
||||
|
||||
if ((ext_table_size < EXT_HEADER_SIZE)
|
||||
|| ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
|
||||
printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
if (copy_from_user(&ext_header, user_buffer + cursor
|
||||
+ MC_HEADER_SIZE + data_size, EXT_HEADER_SIZE)) {
|
||||
printk(KERN_ERR "microcode: error! Can not read user data\n");
|
||||
error = -EFAULT;
|
||||
goto out;
|
||||
}
|
||||
if (ext_table_size != exttable_size(&ext_header)) {
|
||||
printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
|
||||
error = -EFAULT;
|
||||
goto out;
|
||||
}
|
||||
|
||||
ext_sigcount = ext_header.count;
|
||||
|
||||
for (i = 0; i < ext_sigcount; i++) {
|
||||
if (copy_from_user(&ext_sig, user_buffer + cursor + MC_HEADER_SIZE + data_size + EXT_HEADER_SIZE
|
||||
+ EXT_SIGNATURE_SIZE * i, EXT_SIGNATURE_SIZE)) {
|
||||
printk(KERN_ERR "microcode: error! Can not read user data\n");
|
||||
error = -EFAULT;
|
||||
goto out;
|
||||
}
|
||||
for_each_online_cpu(cpu_num) {
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
|
||||
|
||||
if (sigmatch(ext_sig.sig, uci->sig, ext_sig.pf, uci->orig_pf)) {
|
||||
mark_microcode_update(cpu_num, &mc_header, ext_sig.sig, ext_sig.pf, ext_sig.cksum);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
/* now check if any cpu has matched */
|
||||
allocated_flag = 0;
|
||||
sum = 0;
|
||||
for_each_online_cpu(cpu_num) {
|
||||
if (ucode_cpu_info[cpu_num].err == MC_MARKED) {
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
|
||||
if (!allocated_flag) {
|
||||
allocated_flag = 1;
|
||||
newmc = vmalloc(total_size);
|
||||
if (!newmc) {
|
||||
printk(KERN_ERR "microcode: error! Can not allocate memory\n");
|
||||
error = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
if (copy_from_user(newmc + MC_HEADER_SIZE,
|
||||
user_buffer + cursor + MC_HEADER_SIZE,
|
||||
total_size - MC_HEADER_SIZE)) {
|
||||
printk(KERN_ERR "microcode: error! Can not read user data\n");
|
||||
vfree(newmc);
|
||||
error = -EFAULT;
|
||||
goto out;
|
||||
}
|
||||
memcpy(newmc, &mc_header, MC_HEADER_SIZE);
|
||||
/* check extended table checksum */
|
||||
if (ext_table_size) {
|
||||
int ext_table_sum = 0;
|
||||
int * ext_tablep = (((void *) newmc) + MC_HEADER_SIZE + data_size);
|
||||
i = ext_table_size / DWSIZE;
|
||||
while (i--) ext_table_sum += ext_tablep[i];
|
||||
if (ext_table_sum) {
|
||||
printk(KERN_WARNING "microcode: aborting, bad extended signature table checksum\n");
|
||||
vfree(newmc);
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
/* calculate the checksum */
|
||||
i = (MC_HEADER_SIZE + data_size) / DWSIZE;
|
||||
while (i--) sum += ((int *)newmc)[i];
|
||||
sum -= (mc_header.sig + mc_header.pf + mc_header.cksum);
|
||||
}
|
||||
ucode_cpu_info[cpu_num].mc = newmc;
|
||||
ucode_cpu_info[cpu_num].err = MC_ALLOCATED; /* mc updated */
|
||||
if (sum + uci->sig + uci->pf + uci->cksum != 0) {
|
||||
printk(KERN_ERR "microcode: CPU%d aborting, bad checksum\n", cpu_num);
|
||||
error = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
}
|
||||
cursor += total_size; /* goto the next update patch */
|
||||
} /* end of while */
|
||||
out:
|
||||
return error;
|
||||
if (error)
|
||||
microcode_error = error;
|
||||
}
|
||||
|
||||
static void do_update_one (void * unused)
|
||||
static int do_microcode_update(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned int val[2];
|
||||
int cpu_num = smp_processor_id();
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
|
||||
int error = 0;
|
||||
|
||||
if (uci->mc == NULL) {
|
||||
if (verbose) {
|
||||
if (uci->err == MC_SUCCESS)
|
||||
printk(KERN_INFO "microcode: CPU%d already at revision 0x%x\n",
|
||||
cpu_num, uci->rev);
|
||||
else
|
||||
printk(KERN_INFO "microcode: No new microcode data for CPU%d\n", cpu_num);
|
||||
}
|
||||
return;
|
||||
}
|
||||
microcode_error = 0;
|
||||
|
||||
/* serialize access to the physical write to MSR 0x79 */
|
||||
spin_lock_irqsave(µcode_update_lock, flags);
|
||||
|
||||
/* write microcode via MSR 0x79 */
|
||||
wrmsr(MSR_IA32_UCODE_WRITE,
|
||||
(unsigned long) uci->mc->bits,
|
||||
(unsigned long) uci->mc->bits >> 16 >> 16);
|
||||
wrmsr(MSR_IA32_UCODE_REV, 0, 0);
|
||||
|
||||
/* see notes above for revision 1.07. Apparent chip bug */
|
||||
sync_core();
|
||||
|
||||
/* get the current revision from MSR 0x8B */
|
||||
rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
||||
|
||||
/* notify the caller of success on this cpu */
|
||||
uci->err = MC_SUCCESS;
|
||||
spin_unlock_irqrestore(µcode_update_lock, flags);
|
||||
printk(KERN_INFO "microcode: CPU%d updated from revision "
|
||||
"0x%x to 0x%x, date = %08x \n",
|
||||
cpu_num, uci->rev, val[1], uci->mc->hdr.date);
|
||||
return;
|
||||
}
|
||||
|
||||
static int do_microcode_update (void)
|
||||
{
|
||||
int i, error;
|
||||
|
||||
if (on_each_cpu(collect_cpu_info, NULL, 1, 1) != 0) {
|
||||
if (on_each_cpu(do_microcode_update_one, NULL, 1, 1) != 0) {
|
||||
printk(KERN_ERR "microcode: Error! Could not run on all processors\n");
|
||||
error = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if ((error = find_matching_ucodes())) {
|
||||
printk(KERN_ERR "microcode: Error in the microcode data\n");
|
||||
goto out_free;
|
||||
if (microcode_error) {
|
||||
error = microcode_error;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (on_each_cpu(do_update_one, NULL, 1, 1) != 0) {
|
||||
printk(KERN_ERR "microcode: Error! Could not run on all processors\n");
|
||||
error = -EIO;
|
||||
}
|
||||
|
||||
out_free:
|
||||
for_each_online_cpu(i) {
|
||||
if (ucode_cpu_info[i].mc) {
|
||||
int j;
|
||||
void *tmp = ucode_cpu_info[i].mc;
|
||||
vfree(tmp);
|
||||
for_each_online_cpu(j) {
|
||||
if (ucode_cpu_info[j].mc == tmp)
|
||||
ucode_cpu_info[j].mc = NULL;
|
||||
}
|
||||
}
|
||||
if (ucode_cpu_info[i].err == MC_IGNORED && verbose)
|
||||
printk(KERN_WARNING "microcode: CPU%d not 'upgrading' to earlier revision"
|
||||
" 0x%x (current=0x%x)\n", i, ucode_cpu_info[i].cksum, ucode_cpu_info[i].rev);
|
||||
}
|
||||
out:
|
||||
return error;
|
||||
}
|
||||
@@ -458,20 +222,46 @@ out:
|
||||
int microcode_update(XEN_GUEST_HANDLE(const_void) buf, unsigned long len)
|
||||
{
|
||||
int ret;
|
||||
struct cpuinfo_x86 *c = &boot_cpu_data;
|
||||
|
||||
if (len != (typeof(user_buffer_size))len) {
|
||||
if (len != (typeof(microcode_buffer.size))len) {
|
||||
printk(KERN_ERR "microcode: too much data\n");
|
||||
return -E2BIG;
|
||||
}
|
||||
|
||||
mutex_lock(µcode_mutex);
|
||||
switch (c->x86_vendor) {
|
||||
case X86_VENDOR_AMD:
|
||||
ret = microcode_init_amd(c);
|
||||
break;
|
||||
|
||||
user_buffer = buf.p;
|
||||
user_buffer_size = len;
|
||||
case X86_VENDOR_INTEL:
|
||||
ret = microcode_init_intel(c);
|
||||
break;
|
||||
default:
|
||||
printk(KERN_ERR "microcode: CPU vendor not supported\n");
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
microcode_buffer.buf = xmalloc_array(uint8_t, len);
|
||||
if (!microcode_buffer.buf)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = copy_from_guest(microcode_buffer.buf, buf, len);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
microcode_buffer.size = len;
|
||||
wmb();
|
||||
|
||||
ret = do_microcode_update();
|
||||
|
||||
mutex_unlock(µcode_mutex);
|
||||
xfree(microcode_buffer.buf);
|
||||
microcode_buffer.buf = NULL;
|
||||
microcode_buffer.size = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -0,0 +1,366 @@
|
||||
/*
|
||||
* AMD CPU Microcode Update Driver for Linux
|
||||
* Copyright (C) 2008 Advanced Micro Devices Inc.
|
||||
*
|
||||
* Author: Peter Oruba <peter.oruba@amd.com>
|
||||
*
|
||||
* Based on work by:
|
||||
* Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
|
||||
*
|
||||
* This driver allows to upgrade microcode on AMD
|
||||
* family 0x10 and 0x11 processors.
|
||||
*
|
||||
* Licensed unter the terms of the GNU General Public
|
||||
* License version 2. See file COPYING for details.
|
||||
*/
|
||||
|
||||
#include <xen/config.h>
|
||||
#include <xen/lib.h>
|
||||
#include <xen/kernel.h>
|
||||
#include <xen/init.h>
|
||||
#include <xen/sched.h>
|
||||
#include <xen/smp.h>
|
||||
#include <xen/spinlock.h>
|
||||
|
||||
#include <asm/msr.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/microcode.h>
|
||||
|
||||
|
||||
#define pr_debug(x...) ((void)0)
|
||||
#define DEFINE_MUTEX(_m) DEFINE_SPINLOCK(_m)
|
||||
#define mutex_lock(_m) spin_lock(_m)
|
||||
#define mutex_unlock(_m) spin_unlock(_m)
|
||||
#define vmalloc(_s) xmalloc_bytes(_s)
|
||||
#define vfree(_p) xfree(_p)
|
||||
|
||||
|
||||
#define UCODE_MAGIC 0x00414d44
|
||||
#define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
|
||||
#define UCODE_UCODE_TYPE 0x00000001
|
||||
|
||||
#define UCODE_MAX_SIZE (2048)
|
||||
#define DEFAULT_UCODE_DATASIZE (896)
|
||||
#define MC_HEADER_SIZE (sizeof(struct microcode_header_amd))
|
||||
#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
|
||||
#define DWSIZE (sizeof(uint32_t))
|
||||
/* For now we support a fixed ucode total size only */
|
||||
#define get_totalsize(mc) \
|
||||
((((struct microcode_amd *)mc)->hdr.mc_patch_data_len * 28) \
|
||||
+ MC_HEADER_SIZE)
|
||||
|
||||
/* serialize access to the physical write */
|
||||
static DEFINE_SPINLOCK(microcode_update_lock);
|
||||
|
||||
struct equiv_cpu_entry *equiv_cpu_table;
|
||||
|
||||
static long install_equiv_cpu_table(const void *, uint32_t, long);
|
||||
|
||||
static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
|
||||
{
|
||||
struct cpuinfo_x86 *c = &cpu_data[cpu];
|
||||
|
||||
memset(csig, 0, sizeof(*csig));
|
||||
|
||||
if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
|
||||
printk(KERN_ERR "microcode: CPU%d not a capable AMD processor\n",
|
||||
cpu);
|
||||
return -1;
|
||||
}
|
||||
|
||||
asm volatile("movl %1, %%ecx; rdmsr"
|
||||
: "=a" (csig->rev)
|
||||
: "i" (MSR_AMD_PATCHLEVEL) : "ecx");
|
||||
|
||||
printk(KERN_INFO "microcode: collect_cpu_info_amd : patch_id=0x%x\n",
|
||||
csig->rev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int get_matching_microcode_amd(void *mc, int cpu)
|
||||
{
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
||||
struct microcode_header_amd *mc_header = mc;
|
||||
unsigned long total_size = get_totalsize(mc_header);
|
||||
void *new_mc;
|
||||
unsigned int current_cpu_id;
|
||||
unsigned int equiv_cpu_id = 0x00;
|
||||
unsigned int i = 0;
|
||||
|
||||
/* We should bind the task to the CPU */
|
||||
BUG_ON(cpu != raw_smp_processor_id());
|
||||
|
||||
/* This is a tricky part. We might be called from a write operation
|
||||
* to the device file instead of the usual process of firmware
|
||||
* loading. This routine needs to be able to distinguish both
|
||||
* cases. This is done by checking if there already is a equivalent
|
||||
* CPU table installed. If not, we're written through
|
||||
* /dev/cpu/microcode.
|
||||
* Since we ignore all checks. The error case in which going through
|
||||
* firmware loading and that table is not loaded has already been
|
||||
* checked earlier.
|
||||
*/
|
||||
if (equiv_cpu_table == NULL) {
|
||||
printk(KERN_INFO "microcode: CPU%d microcode update with "
|
||||
"version 0x%x (current=0x%x)\n",
|
||||
cpu, mc_header->patch_id, uci->cpu_sig.rev);
|
||||
goto out;
|
||||
}
|
||||
|
||||
current_cpu_id = cpuid_eax(0x00000001);
|
||||
|
||||
while (equiv_cpu_table[i].installed_cpu != 0) {
|
||||
if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
|
||||
equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
|
||||
break;
|
||||
}
|
||||
i++;
|
||||
}
|
||||
|
||||
if (!equiv_cpu_id) {
|
||||
printk(KERN_ERR "microcode: CPU%d cpu_id "
|
||||
"not found in equivalent cpu table \n", cpu);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if ((mc_header->processor_rev_id[0]) != (equiv_cpu_id & 0xff)) {
|
||||
printk(KERN_INFO
|
||||
"microcode: CPU%d patch does not match "
|
||||
"(patch is %x, cpu extended is %x) \n",
|
||||
cpu, mc_header->processor_rev_id[0],
|
||||
(equiv_cpu_id & 0xff));
|
||||
return 0;
|
||||
}
|
||||
|
||||
if ((mc_header->processor_rev_id[1]) != ((equiv_cpu_id >> 16) & 0xff)) {
|
||||
printk(KERN_INFO "microcode: CPU%d patch does not match "
|
||||
"(patch is %x, cpu base id is %x) \n",
|
||||
cpu, mc_header->processor_rev_id[1],
|
||||
((equiv_cpu_id >> 16) & 0xff));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (mc_header->patch_id <= uci->cpu_sig.rev)
|
||||
return 0;
|
||||
|
||||
printk(KERN_INFO "microcode: CPU%d found a matching microcode "
|
||||
"update with version 0x%x (current=0x%x)\n",
|
||||
cpu, mc_header->patch_id, uci->cpu_sig.rev);
|
||||
|
||||
out:
|
||||
new_mc = vmalloc(UCODE_MAX_SIZE);
|
||||
if (!new_mc) {
|
||||
printk(KERN_ERR "microcode: error, can't allocate memory\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
memset(new_mc, 0, UCODE_MAX_SIZE);
|
||||
|
||||
/* free previous update file */
|
||||
vfree(uci->mc.mc_amd);
|
||||
|
||||
memcpy(new_mc, mc, total_size);
|
||||
|
||||
uci->mc.mc_amd = new_mc;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int apply_microcode_amd(int cpu)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned int eax, edx;
|
||||
unsigned int rev;
|
||||
int cpu_num = raw_smp_processor_id();
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
|
||||
unsigned long addr;
|
||||
|
||||
/* We should bind the task to the CPU */
|
||||
BUG_ON(cpu_num != cpu);
|
||||
|
||||
if (uci->mc.mc_amd == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
spin_lock_irqsave(µcode_update_lock, flags);
|
||||
|
||||
addr = (unsigned long)&uci->mc.mc_amd->hdr.data_code;
|
||||
edx = (unsigned int)((unsigned long)(addr >> 32));
|
||||
eax = (unsigned int)((unsigned long)(addr & 0xffffffff));
|
||||
|
||||
asm volatile("movl %0, %%ecx; wrmsr" :
|
||||
: "i" (MSR_AMD_PATCHLOADER), "a" (eax), "d" (edx) : "ecx");
|
||||
|
||||
/* get patch id after patching */
|
||||
asm volatile("movl %1, %%ecx; rdmsr"
|
||||
: "=a" (rev)
|
||||
: "i" (MSR_AMD_PATCHLEVEL) : "ecx");
|
||||
|
||||
spin_unlock_irqrestore(µcode_update_lock, flags);
|
||||
|
||||
/* check current patch id and patch's id for match */
|
||||
if (rev != uci->mc.mc_amd->hdr.patch_id) {
|
||||
printk(KERN_ERR "microcode: CPU%d update from revision "
|
||||
"0x%x to 0x%x failed\n", cpu_num,
|
||||
uci->mc.mc_amd->hdr.patch_id, rev);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
printk("microcode: CPU%d updated from revision "
|
||||
"0x%x to 0x%x \n",
|
||||
cpu_num, uci->cpu_sig.rev, uci->mc.mc_amd->hdr.patch_id);
|
||||
|
||||
uci->cpu_sig.rev = rev;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static long get_next_ucode_from_buffer_amd(void **mc, const void *buf,
|
||||
unsigned long size, long offset)
|
||||
{
|
||||
struct microcode_header_amd *mc_header;
|
||||
unsigned long total_size;
|
||||
const uint8_t *buf_pos = buf;
|
||||
|
||||
/* No more data */
|
||||
if (offset >= size)
|
||||
return 0;
|
||||
|
||||
if (buf_pos[offset] != UCODE_UCODE_TYPE) {
|
||||
printk(KERN_ERR "microcode: error! "
|
||||
"Wrong microcode payload type field\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mc_header = (struct microcode_header_amd *)(&buf_pos[offset+8]);
|
||||
|
||||
total_size = (unsigned long) (buf_pos[offset+4] +
|
||||
(buf_pos[offset+5] << 8));
|
||||
|
||||
printk(KERN_INFO "microcode: size %lu, total_size %lu, offset %ld\n",
|
||||
size, total_size, offset);
|
||||
|
||||
if (offset + total_size > size) {
|
||||
printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
*mc = vmalloc(UCODE_MAX_SIZE);
|
||||
if (!*mc) {
|
||||
printk(KERN_ERR "microcode: error! "
|
||||
"Can not allocate memory for microcode patch\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
memset(*mc, 0, UCODE_MAX_SIZE);
|
||||
memcpy(*mc, (const void *)(buf + offset + 8), total_size);
|
||||
|
||||
return offset + total_size + 8;
|
||||
}
|
||||
|
||||
static long install_equiv_cpu_table(const void *buf,
|
||||
uint32_t size, long offset)
|
||||
{
|
||||
const uint32_t *buf_pos = buf;
|
||||
|
||||
/* No more data */
|
||||
if (offset >= size)
|
||||
return 0;
|
||||
|
||||
if (buf_pos[1] != UCODE_EQUIV_CPU_TABLE_TYPE) {
|
||||
printk(KERN_ERR "microcode: error! "
|
||||
"Wrong microcode equivalnet cpu table type field\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (size == 0) {
|
||||
printk(KERN_ERR "microcode: error! "
|
||||
"Wrong microcode equivalnet cpu table length\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
equiv_cpu_table = (struct equiv_cpu_entry *) vmalloc(size);
|
||||
if (!equiv_cpu_table) {
|
||||
printk(KERN_ERR "microcode: error, can't allocate memory for equiv CPU table\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
memset(equiv_cpu_table, 0, size);
|
||||
memcpy(equiv_cpu_table, (const void *)&buf_pos[3], size);
|
||||
|
||||
return size + 12; /* add header length */
|
||||
}
|
||||
|
||||
static int cpu_request_microcode_amd(int cpu, const void *buf,
|
||||
size_t size)
|
||||
{
|
||||
const uint32_t *buf_pos;
|
||||
long offset = 0;
|
||||
int error = 0;
|
||||
void *mc;
|
||||
|
||||
/* We should bind the task to the CPU */
|
||||
BUG_ON(cpu != raw_smp_processor_id());
|
||||
|
||||
buf_pos = (const uint32_t *)buf;
|
||||
|
||||
if (buf_pos[0] != UCODE_MAGIC) {
|
||||
printk(KERN_ERR "microcode: error! Wrong microcode patch file magic\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
offset = install_equiv_cpu_table(buf, (uint32_t)(buf_pos[2]), offset);
|
||||
if (!offset) {
|
||||
printk(KERN_ERR "microcode: installing equivalent cpu table failed\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
while ((offset =
|
||||
get_next_ucode_from_buffer_amd(&mc, buf, size, offset)) > 0) {
|
||||
error = get_matching_microcode_amd(mc, cpu);
|
||||
if (error < 0)
|
||||
break;
|
||||
/*
|
||||
* It's possible the data file has multiple matching ucode,
|
||||
* lets keep searching till the latest version
|
||||
*/
|
||||
if (error == 1) {
|
||||
apply_microcode_amd(cpu);
|
||||
error = 0;
|
||||
}
|
||||
vfree(mc);
|
||||
}
|
||||
if (offset > 0) {
|
||||
vfree(mc);
|
||||
vfree(equiv_cpu_table);
|
||||
equiv_cpu_table = NULL;
|
||||
}
|
||||
if (offset < 0)
|
||||
error = offset;
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static void microcode_fini_cpu_amd(int cpu)
|
||||
{
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
||||
|
||||
vfree(uci->mc.mc_amd);
|
||||
uci->mc.mc_amd = NULL;
|
||||
}
|
||||
|
||||
static struct microcode_ops microcode_amd_ops = {
|
||||
.get_matching_microcode = get_matching_microcode_amd,
|
||||
.microcode_sanity_check = NULL,
|
||||
.cpu_request_microcode = cpu_request_microcode_amd,
|
||||
.collect_cpu_info = collect_cpu_info_amd,
|
||||
.apply_microcode = apply_microcode_amd,
|
||||
.microcode_fini_cpu = microcode_fini_cpu_amd,
|
||||
};
|
||||
|
||||
int microcode_init_amd(struct cpuinfo_x86 *c)
|
||||
{
|
||||
microcode_ops = µcode_amd_ops;
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,425 @@
|
||||
/*
|
||||
* Intel CPU Microcode Update Driver for Linux
|
||||
*
|
||||
* Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
|
||||
* 2006 Shaohua Li <shaohua.li@intel.com> *
|
||||
* This driver allows to upgrade microcode on Intel processors
|
||||
* belonging to IA-32 family - PentiumPro, Pentium II,
|
||||
* Pentium III, Xeon, Pentium 4, etc.
|
||||
*
|
||||
* Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
|
||||
* Software Developer's Manual
|
||||
* Order Number 253668 or free download from:
|
||||
*
|
||||
* http://developer.intel.com/design/pentium4/manuals/253668.htm
|
||||
*
|
||||
* For more information, go to http://www.urbanmyth.org/microcode
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
* 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
|
||||
* Initial release.
|
||||
* 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
|
||||
* Added read() support + cleanups.
|
||||
* 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
|
||||
* Added 'device trimming' support. open(O_WRONLY) zeroes
|
||||
* and frees the saved copy of applied microcode.
|
||||
* 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
|
||||
* Made to use devfs (/dev/cpu/microcode) + cleanups.
|
||||
* 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
|
||||
* Added misc device support (now uses both devfs and misc).
|
||||
* Added MICROCODE_IOCFREE ioctl to clear memory.
|
||||
* 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
|
||||
* Messages for error cases (non Intel & no suitable microcode).
|
||||
* 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
|
||||
* Removed ->release(). Removed exclusive open and status bitmap.
|
||||
* Added microcode_rwsem to serialize read()/write()/ioctl().
|
||||
* Removed global kernel lock usage.
|
||||
* 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
|
||||
* Write 0 to 0x8B msr and then cpuid before reading revision,
|
||||
* so that it works even if there were no update done by the
|
||||
* BIOS. Otherwise, reading from 0x8B gives junk (which happened
|
||||
* to be 0 on my machine which is why it worked even when I
|
||||
* disabled update by the BIOS)
|
||||
* Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
|
||||
* 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
|
||||
* Tigran Aivazian <tigran@veritas.com>
|
||||
* Intel Pentium 4 processor support and bugfixes.
|
||||
* 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
|
||||
* Bugfix for HT (Hyper-Threading) enabled processors
|
||||
* whereby processor resources are shared by all logical processors
|
||||
* in a single CPU package.
|
||||
* 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
|
||||
* Tigran Aivazian <tigran@veritas.com>,
|
||||
* Serialize updates as required on HT processors due to
|
||||
* speculative nature of implementation.
|
||||
* 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
|
||||
* Fix the panic when writing zero-length microcode chunk.
|
||||
* 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
|
||||
* Jun Nakajima <jun.nakajima@intel.com>
|
||||
* Support for the microcode updates in the new format.
|
||||
* 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
|
||||
* Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
|
||||
* because we no longer hold a copy of applied microcode
|
||||
* in kernel memory.
|
||||
* 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
|
||||
* Fix sigmatch() macro to handle old CPUs with pf == 0.
|
||||
* Thanks to Stuart Swales for pointing out this bug.
|
||||
*/
|
||||
|
||||
#include <xen/config.h>
|
||||
#include <xen/lib.h>
|
||||
#include <xen/kernel.h>
|
||||
#include <xen/init.h>
|
||||
#include <xen/sched.h>
|
||||
#include <xen/smp.h>
|
||||
#include <xen/spinlock.h>
|
||||
|
||||
#include <asm/msr.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/microcode.h>
|
||||
|
||||
#define pr_debug(x...) ((void)0)
|
||||
#define DEFINE_MUTEX(_m) DEFINE_SPINLOCK(_m)
|
||||
#define mutex_lock(_m) spin_lock(_m)
|
||||
#define mutex_unlock(_m) spin_unlock(_m)
|
||||
#define vmalloc(_s) xmalloc_bytes(_s)
|
||||
#define vfree(_p) xfree(_p)
|
||||
|
||||
#if 0
|
||||
MODULE_DESCRIPTION("Microcode Update Driver");
|
||||
MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
|
||||
MODULE_LICENSE("GPL");
|
||||
#endif
|
||||
|
||||
#define DEFAULT_UCODE_DATASIZE (2000)
|
||||
#define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
|
||||
#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
|
||||
#define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
|
||||
#define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
|
||||
#define DWSIZE (sizeof(u32))
|
||||
#define get_totalsize(mc) \
|
||||
(((struct microcode_intel *)mc)->hdr.totalsize ? \
|
||||
((struct microcode_intel *)mc)->hdr.totalsize : \
|
||||
DEFAULT_UCODE_TOTALSIZE)
|
||||
|
||||
#define get_datasize(mc) \
|
||||
(((struct microcode_intel *)mc)->hdr.datasize ? \
|
||||
((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
|
||||
|
||||
#define sigmatch(s1, s2, p1, p2) \
|
||||
(((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
|
||||
|
||||
#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
|
||||
|
||||
/* serialize access to the physical write to MSR 0x79 */
|
||||
static DEFINE_SPINLOCK(microcode_update_lock);
|
||||
|
||||
static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
|
||||
{
|
||||
struct cpuinfo_x86 *c = &cpu_data[cpu_num];
|
||||
unsigned int val[2];
|
||||
|
||||
memset(csig, 0, sizeof(*csig));
|
||||
|
||||
if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
|
||||
cpu_has(c, X86_FEATURE_IA64)) {
|
||||
printk(KERN_ERR "microcode: CPU%d not a capable Intel "
|
||||
"processor\n", cpu_num);
|
||||
return -1;
|
||||
}
|
||||
|
||||
csig->sig = cpuid_eax(0x00000001);
|
||||
|
||||
if ((c->x86_model >= 5) || (c->x86 > 6)) {
|
||||
/* get processor flags from MSR 0x17 */
|
||||
rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
|
||||
csig->pf = 1 << ((val[1] >> 18) & 7);
|
||||
}
|
||||
|
||||
wrmsr(MSR_IA32_UCODE_REV, 0, 0);
|
||||
/* see notes above for revision 1.07. Apparent chip bug */
|
||||
sync_core();
|
||||
/* get the current revision from MSR 0x8B */
|
||||
rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
|
||||
pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
|
||||
csig->sig, csig->pf, csig->rev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int microcode_update_match(int cpu_num,
|
||||
struct microcode_header_intel *mc_header, int sig, int pf)
|
||||
{
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
|
||||
|
||||
if (!sigmatch(sig, uci->cpu_sig.sig, pf, uci->cpu_sig.pf)
|
||||
|| mc_header->rev <= uci->cpu_sig.rev)
|
||||
return 0;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int microcode_sanity_check(void *mc)
|
||||
{
|
||||
struct microcode_header_intel *mc_header = mc;
|
||||
struct extended_sigtable *ext_header = NULL;
|
||||
struct extended_signature *ext_sig;
|
||||
unsigned long total_size, data_size, ext_table_size;
|
||||
int sum, orig_sum, ext_sigcount = 0, i;
|
||||
|
||||
total_size = get_totalsize(mc_header);
|
||||
data_size = get_datasize(mc_header);
|
||||
if (data_size + MC_HEADER_SIZE > total_size) {
|
||||
printk(KERN_ERR "microcode: error! "
|
||||
"Bad data size in microcode data file\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
|
||||
printk(KERN_ERR "microcode: error! "
|
||||
"Unknown microcode update format\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
|
||||
if (ext_table_size) {
|
||||
if ((ext_table_size < EXT_HEADER_SIZE)
|
||||
|| ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
|
||||
printk(KERN_ERR "microcode: error! "
|
||||
"Small exttable size in microcode data file\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
ext_header = mc + MC_HEADER_SIZE + data_size;
|
||||
if (ext_table_size != exttable_size(ext_header)) {
|
||||
printk(KERN_ERR "microcode: error! "
|
||||
"Bad exttable size in microcode data file\n");
|
||||
return -EFAULT;
|
||||
}
|
||||
ext_sigcount = ext_header->count;
|
||||
}
|
||||
|
||||
/* check extended table checksum */
|
||||
if (ext_table_size) {
|
||||
int ext_table_sum = 0;
|
||||
int *ext_tablep = (int *)ext_header;
|
||||
|
||||
i = ext_table_size / DWSIZE;
|
||||
while (i--)
|
||||
ext_table_sum += ext_tablep[i];
|
||||
if (ext_table_sum) {
|
||||
printk(KERN_WARNING "microcode: aborting, "
|
||||
"bad extended signature table checksum\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
/* calculate the checksum */
|
||||
orig_sum = 0;
|
||||
i = (MC_HEADER_SIZE + data_size) / DWSIZE;
|
||||
while (i--)
|
||||
orig_sum += ((int *)mc)[i];
|
||||
if (orig_sum) {
|
||||
printk(KERN_ERR "microcode: aborting, bad checksum\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
if (!ext_table_size)
|
||||
return 0;
|
||||
/* check extended signature checksum */
|
||||
for (i = 0; i < ext_sigcount; i++) {
|
||||
ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
|
||||
EXT_SIGNATURE_SIZE * i;
|
||||
sum = orig_sum
|
||||
- (mc_header->sig + mc_header->pf + mc_header->cksum)
|
||||
+ (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
|
||||
if (sum) {
|
||||
printk(KERN_ERR "microcode: aborting, bad checksum\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* return 0 - no update found
|
||||
* return 1 - found update
|
||||
* return < 0 - error
|
||||
*/
|
||||
static int get_matching_microcode(void *mc, int cpu)
|
||||
{
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
||||
struct microcode_header_intel *mc_header = mc;
|
||||
struct extended_sigtable *ext_header;
|
||||
unsigned long total_size = get_totalsize(mc_header);
|
||||
int ext_sigcount, i;
|
||||
struct extended_signature *ext_sig;
|
||||
void *new_mc;
|
||||
|
||||
if (microcode_update_match(cpu, mc_header,
|
||||
mc_header->sig, mc_header->pf))
|
||||
goto find;
|
||||
|
||||
if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
|
||||
return 0;
|
||||
|
||||
ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
|
||||
ext_sigcount = ext_header->count;
|
||||
ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
|
||||
for (i = 0; i < ext_sigcount; i++) {
|
||||
if (microcode_update_match(cpu, mc_header,
|
||||
ext_sig->sig, ext_sig->pf))
|
||||
goto find;
|
||||
ext_sig++;
|
||||
}
|
||||
return 0;
|
||||
find:
|
||||
pr_debug("microcode: CPU%d found a matching microcode update with"
|
||||
" version 0x%x (current=0x%x)\n",
|
||||
cpu, mc_header->rev, uci->cpu_sig.rev);
|
||||
new_mc = vmalloc(total_size);
|
||||
if (!new_mc) {
|
||||
printk(KERN_ERR "microcode: error! Can not allocate memory\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* free previous update file */
|
||||
vfree(uci->mc.mc_intel);
|
||||
|
||||
memcpy(new_mc, mc, total_size);
|
||||
uci->mc.mc_intel = new_mc;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int apply_microcode(int cpu)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned int val[2];
|
||||
int cpu_num = raw_smp_processor_id();
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
|
||||
|
||||
/* We should bind the task to the CPU */
|
||||
BUG_ON(cpu_num != cpu);
|
||||
|
||||
if (uci->mc.mc_intel == NULL)
|
||||
return -EINVAL;
|
||||
|
||||
/* serialize access to the physical write to MSR 0x79 */
|
||||
spin_lock_irqsave(µcode_update_lock, flags);
|
||||
|
||||
/* write microcode via MSR 0x79 */
|
||||
wrmsr(MSR_IA32_UCODE_WRITE,
|
||||
(unsigned long) uci->mc.mc_intel->bits,
|
||||
(unsigned long) uci->mc.mc_intel->bits >> 16 >> 16);
|
||||
wrmsr(MSR_IA32_UCODE_REV, 0, 0);
|
||||
|
||||
/* see notes above for revision 1.07. Apparent chip bug */
|
||||
sync_core();
|
||||
|
||||
/* get the current revision from MSR 0x8B */
|
||||
rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
|
||||
|
||||
spin_unlock_irqrestore(µcode_update_lock, flags);
|
||||
if (val[1] != uci->mc.mc_intel->hdr.rev) {
|
||||
printk(KERN_ERR "microcode: CPU%d update from revision "
|
||||
"0x%x to 0x%x failed\n", cpu_num, uci->cpu_sig.rev, val[1]);
|
||||
return -EIO;
|
||||
}
|
||||
printk(KERN_INFO "microcode: CPU%d updated from revision "
|
||||
"0x%x to 0x%x, date = %04x-%02x-%02x \n",
|
||||
cpu_num, uci->cpu_sig.rev, val[1],
|
||||
uci->mc.mc_intel->hdr.date & 0xffff,
|
||||
uci->mc.mc_intel->hdr.date >> 24,
|
||||
(uci->mc.mc_intel->hdr.date >> 16) & 0xff);
|
||||
uci->cpu_sig.rev = val[1];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static long get_next_ucode_from_buffer(void **mc, const u8 *buf,
|
||||
unsigned long size, long offset)
|
||||
{
|
||||
struct microcode_header_intel *mc_header;
|
||||
unsigned long total_size;
|
||||
|
||||
/* No more data */
|
||||
if (offset >= size)
|
||||
return 0;
|
||||
mc_header = (struct microcode_header_intel *)(buf + offset);
|
||||
total_size = get_totalsize(mc_header);
|
||||
|
||||
if (offset + total_size > size) {
|
||||
printk(KERN_ERR "microcode: error! Bad data in microcode data file\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
*mc = vmalloc(total_size);
|
||||
if (!*mc) {
|
||||
printk(KERN_ERR "microcode: error! Can not allocate memory\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
memcpy(*mc, (const void *)(buf + offset), total_size);
|
||||
return offset + total_size;
|
||||
}
|
||||
|
||||
/* fake device for request_firmware */
|
||||
extern struct platform_device *microcode_pdev;
|
||||
|
||||
static int cpu_request_microcode(int cpu, const void *buf, size_t size)
|
||||
{
|
||||
long offset = 0;
|
||||
int error = 0;
|
||||
void *mc;
|
||||
|
||||
/* We should bind the task to the CPU */
|
||||
BUG_ON(cpu != raw_smp_processor_id());
|
||||
|
||||
while ((offset = get_next_ucode_from_buffer(&mc, buf, size, offset))
|
||||
> 0) {
|
||||
error = microcode_sanity_check(mc);
|
||||
if (error)
|
||||
break;
|
||||
error = get_matching_microcode(mc, cpu);
|
||||
if (error < 0)
|
||||
break;
|
||||
/*
|
||||
* It's possible the data file has multiple matching ucode,
|
||||
* lets keep searching till the latest version
|
||||
*/
|
||||
if (error == 1) {
|
||||
apply_microcode(cpu);
|
||||
error = 0;
|
||||
}
|
||||
vfree(mc);
|
||||
}
|
||||
if (offset > 0)
|
||||
vfree(mc);
|
||||
if (offset < 0)
|
||||
error = offset;
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
static void microcode_fini_cpu(int cpu)
|
||||
{
|
||||
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
|
||||
|
||||
vfree(uci->mc.mc_intel);
|
||||
uci->mc.mc_intel = NULL;
|
||||
}
|
||||
|
||||
static struct microcode_ops microcode_intel_ops = {
|
||||
.get_matching_microcode = get_matching_microcode,
|
||||
.microcode_sanity_check = microcode_sanity_check,
|
||||
.cpu_request_microcode = cpu_request_microcode,
|
||||
.collect_cpu_info = collect_cpu_info,
|
||||
.apply_microcode = apply_microcode,
|
||||
.microcode_fini_cpu = microcode_fini_cpu,
|
||||
};
|
||||
|
||||
int microcode_init_intel(struct cpuinfo_x86 *c)
|
||||
{
|
||||
microcode_ops = µcode_intel_ops;
|
||||
return 0;
|
||||
}
|
||||
@@ -0,0 +1,100 @@
|
||||
#ifndef ASM_X86__MICROCODE_H
|
||||
#define ASM_X86__MICROCODE_H
|
||||
|
||||
struct cpu_signature;
|
||||
|
||||
struct microcode_ops {
|
||||
long (*microcode_get_next_ucode)(void **mc, long offset);
|
||||
int (*get_matching_microcode)(void *mc, int cpu);
|
||||
int (*microcode_sanity_check)(void *mc);
|
||||
int (*cpu_request_microcode)(int cpu, const void *buf, size_t size);
|
||||
int (*collect_cpu_info)(int cpu_num, struct cpu_signature *csig);
|
||||
int (*apply_microcode)(int cpu);
|
||||
void (*microcode_fini_cpu)(int cpu);
|
||||
void (*clear_patch)(void *data);
|
||||
};
|
||||
|
||||
struct microcode_header_intel {
|
||||
unsigned int hdrver;
|
||||
unsigned int rev;
|
||||
unsigned int date;
|
||||
unsigned int sig;
|
||||
unsigned int cksum;
|
||||
unsigned int ldrver;
|
||||
unsigned int pf;
|
||||
unsigned int datasize;
|
||||
unsigned int totalsize;
|
||||
unsigned int reserved[3];
|
||||
};
|
||||
|
||||
struct microcode_intel {
|
||||
struct microcode_header_intel hdr;
|
||||
unsigned int bits[0];
|
||||
};
|
||||
|
||||
/* microcode format is extended from prescott processors */
|
||||
struct extended_signature {
|
||||
unsigned int sig;
|
||||
unsigned int pf;
|
||||
unsigned int cksum;
|
||||
};
|
||||
|
||||
struct extended_sigtable {
|
||||
unsigned int count;
|
||||
unsigned int cksum;
|
||||
unsigned int reserved[3];
|
||||
struct extended_signature sigs[0];
|
||||
};
|
||||
|
||||
struct equiv_cpu_entry {
|
||||
unsigned int installed_cpu;
|
||||
unsigned int fixed_errata_mask;
|
||||
unsigned int fixed_errata_compare;
|
||||
unsigned int equiv_cpu;
|
||||
};
|
||||
|
||||
struct microcode_header_amd {
|
||||
unsigned int data_code;
|
||||
unsigned int patch_id;
|
||||
unsigned char mc_patch_data_id[2];
|
||||
unsigned char mc_patch_data_len;
|
||||
unsigned char init_flag;
|
||||
unsigned int mc_patch_data_checksum;
|
||||
unsigned int nb_dev_id;
|
||||
unsigned int sb_dev_id;
|
||||
unsigned char processor_rev_id[2];
|
||||
unsigned char nb_rev_id;
|
||||
unsigned char sb_rev_id;
|
||||
unsigned char bios_api_rev;
|
||||
unsigned char reserved1[3];
|
||||
unsigned int match_reg[8];
|
||||
};
|
||||
|
||||
struct microcode_amd {
|
||||
struct microcode_header_amd hdr;
|
||||
unsigned int mpb[0];
|
||||
};
|
||||
|
||||
struct cpu_signature {
|
||||
unsigned int sig;
|
||||
unsigned int pf;
|
||||
unsigned int rev;
|
||||
};
|
||||
|
||||
struct ucode_cpu_info {
|
||||
struct cpu_signature cpu_sig;
|
||||
int valid;
|
||||
union {
|
||||
struct microcode_intel *mc_intel;
|
||||
struct microcode_amd *mc_amd;
|
||||
void *valid_mc;
|
||||
} mc;
|
||||
};
|
||||
extern struct ucode_cpu_info ucode_cpu_info[];
|
||||
|
||||
extern const struct microcode_ops *microcode_ops;
|
||||
|
||||
int microcode_init_amd(struct cpuinfo_x86 *c);
|
||||
int microcode_init_intel(struct cpuinfo_x86 *c);
|
||||
|
||||
#endif /* ASM_X86__MICROCODE_H */
|
||||
@@ -211,6 +211,10 @@
|
||||
#define FAM10H_MMIO_CONF_BASE_MASK 0xfffffff
|
||||
#define FAM10H_MMIO_CONF_BASE_SHIFT 20
|
||||
|
||||
/* AMD Microcode MSRs */
|
||||
#define MSR_AMD_PATCHLEVEL 0x0000008b
|
||||
#define MSR_AMD_PATCHLOADER 0xc0010020
|
||||
|
||||
/* K6 MSRs */
|
||||
#define MSR_K6_EFER 0xc0000080
|
||||
#define MSR_K6_STAR 0xc0000081
|
||||
|
||||
@@ -486,41 +486,6 @@ long set_gdt(struct vcpu *d,
|
||||
})
|
||||
long set_debugreg(struct vcpu *p, int reg, unsigned long value);
|
||||
|
||||
struct microcode_header {
|
||||
unsigned int hdrver;
|
||||
unsigned int rev;
|
||||
unsigned int date;
|
||||
unsigned int sig;
|
||||
unsigned int cksum;
|
||||
unsigned int ldrver;
|
||||
unsigned int pf;
|
||||
unsigned int datasize;
|
||||
unsigned int totalsize;
|
||||
unsigned int reserved[3];
|
||||
};
|
||||
|
||||
struct microcode {
|
||||
struct microcode_header hdr;
|
||||
unsigned int bits[0];
|
||||
};
|
||||
|
||||
typedef struct microcode microcode_t;
|
||||
typedef struct microcode_header microcode_header_t;
|
||||
|
||||
/* microcode format is extended from prescott processors */
|
||||
struct extended_signature {
|
||||
unsigned int sig;
|
||||
unsigned int pf;
|
||||
unsigned int cksum;
|
||||
};
|
||||
|
||||
struct extended_sigtable {
|
||||
unsigned int count;
|
||||
unsigned int cksum;
|
||||
unsigned int reserved[3];
|
||||
struct extended_signature sigs[0];
|
||||
};
|
||||
|
||||
/* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
|
||||
static always_inline void rep_nop(void)
|
||||
{
|
||||
|
||||