diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index f63fe9680a..b9824d443f 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -1405,7 +1405,9 @@ The following options are specific to Intel VT-d hardware: * The `qinval` boolean controls the Queued Invalidation sub-feature, and is active by default on compatible hardware. Queued Invalidation is a feature in second-generation IOMMUs and is a functional prerequisite for - Interrupt Remapping. + Interrupt Remapping. Note that Xen disregards this setting for Intel VT-d + version 6 and greater as Registered-Based Invalidation isn't supported + by them. * The `igfx` boolean is active by default, and controls whether the IOMMU in front of an Intel Graphics Device is enabled or not. diff --git a/xen/drivers/passthrough/vtd/iommu.c b/xen/drivers/passthrough/vtd/iommu.c index 74c7aca24b..32ff60bfe3 100644 --- a/xen/drivers/passthrough/vtd/iommu.c +++ b/xen/drivers/passthrough/vtd/iommu.c @@ -1188,6 +1188,14 @@ int __init iommu_alloc(struct acpi_drhd_unit *drhd) iommu->cap = dmar_readq(iommu->reg, DMAR_CAP_REG); iommu->ecap = dmar_readq(iommu->reg, DMAR_ECAP_REG); + iommu->version = dmar_readl(iommu->reg, DMAR_VER_REG); + + if ( !iommu_qinval && !has_register_based_invalidation(iommu) ) + { + printk(XENLOG_WARNING VTDPREFIX "IOMMU %d: cannot disable Queued Invalidation\n", + iommu->index); + iommu_qinval = true; + } if ( iommu_verbose ) { @@ -2161,6 +2169,10 @@ static int __must_check init_vtd_hw(bool resume) */ if ( enable_qinval(iommu) != 0 ) { + /* Ensure register-based invalidation is available */ + if ( !has_register_based_invalidation(iommu) ) + return -EIO; + iommu->flush.context = vtd_flush_context_reg; iommu->flush.iotlb = vtd_flush_iotlb_reg; } @@ -2251,6 +2263,7 @@ static int __init vtd_setup(void) struct acpi_drhd_unit *drhd; struct vtd_iommu *iommu; int ret; + bool reg_inval_supported = true; if ( list_empty(&acpi_drhd_units) ) { @@ -2272,8 +2285,8 @@ static int __init vtd_setup(void) } /* We enable the following features only if they are supported by all VT-d - * engines: Snoop Control, DMA passthrough, Queued Invalidation, Interrupt - * Remapping, and Posted Interrupt + * engines: Snoop Control, DMA passthrough, Register-based Invalidation, + * Queued Invalidation, Interrupt Remapping, and Posted Interrupt. */ for_each_drhd_unit ( drhd ) { @@ -2295,6 +2308,9 @@ static int __init vtd_setup(void) if ( iommu_qinval && !ecap_queued_inval(iommu->ecap) ) iommu_qinval = 0; + if ( !has_register_based_invalidation(iommu) ) + reg_inval_supported = false; + if ( iommu_intremap && !ecap_intr_remap(iommu->ecap) ) iommu_intremap = iommu_intremap_off; @@ -2321,6 +2337,13 @@ static int __init vtd_setup(void) softirq_tasklet_init(&vtd_fault_tasklet, do_iommu_page_fault, NULL); + if ( !iommu_qinval && !reg_inval_supported ) + { + dprintk(XENLOG_ERR VTDPREFIX, "No available invalidation interface\n"); + ret = -ENODEV; + goto error; + } + if ( !iommu_qinval && iommu_intremap ) { iommu_intremap = iommu_intremap_off; diff --git a/xen/drivers/passthrough/vtd/iommu.h b/xen/drivers/passthrough/vtd/iommu.h index 216791b3d6..57737b1a4a 100644 --- a/xen/drivers/passthrough/vtd/iommu.h +++ b/xen/drivers/passthrough/vtd/iommu.h @@ -540,6 +540,7 @@ struct vtd_iommu { struct list_head ats_devices; unsigned long *domid_bitmap; /* domain id bitmap */ u16 *domid_map; /* domain id mapping array */ + uint32_t version; }; #define INTEL_IOMMU_DEBUG(fmt, args...) \ @@ -549,4 +550,10 @@ struct vtd_iommu { dprintk(XENLOG_WARNING VTDPREFIX, fmt, ## args); \ } while(0) +/* Register-based invalidation isn't supported by VT-d version 6 and beyond. */ +static inline bool has_register_based_invalidation(const struct vtd_iommu *vtd) +{ + return VER_MAJOR(vtd->version) < 6; +} + #endif diff --git a/xen/drivers/passthrough/vtd/qinval.c b/xen/drivers/passthrough/vtd/qinval.c index 764ef9f0fc..dfcbb66c8a 100644 --- a/xen/drivers/passthrough/vtd/qinval.c +++ b/xen/drivers/passthrough/vtd/qinval.c @@ -442,6 +442,23 @@ int enable_qinval(struct vtd_iommu *iommu) return 0; } +static int vtd_flush_context_noop(struct vtd_iommu *iommu, uint16_t did, + uint16_t source_id, uint8_t function_mask, + uint64_t type, bool flush_non_present_entry) +{ + WARN(); + return -EIO; +} + +static int vtd_flush_iotlb_noop(struct vtd_iommu *iommu, uint16_t did, + uint64_t addr, unsigned int size_order, + uint64_t type, bool flush_non_present_entry, + bool flush_dev_iotlb) +{ + WARN(); + return -EIO; +} + void disable_qinval(struct vtd_iommu *iommu) { u32 sts; @@ -463,6 +480,18 @@ void disable_qinval(struct vtd_iommu *iommu) out: spin_unlock_irqrestore(&iommu->register_lock, flags); - iommu->flush.context = vtd_flush_context_reg; - iommu->flush.iotlb = vtd_flush_iotlb_reg; + /* + * Assign callbacks to noop to catch errors if register-based invalidation + * isn't supported. + */ + if ( has_register_based_invalidation(iommu) ) + { + iommu->flush.context = vtd_flush_context_reg; + iommu->flush.iotlb = vtd_flush_iotlb_reg; + } + else + { + iommu->flush.context = vtd_flush_context_noop; + iommu->flush.iotlb = vtd_flush_iotlb_noop; + } }