From c2ff2ca3a9dd60e1fb7d6c252be5cb1865952fda Mon Sep 17 00:00:00 2001 From: Nicola Vetrini Date: Thu, 29 Jun 2023 12:06:16 +0200 Subject: [PATCH] xen/arm: smmuv3: fix violations of MISRA C:2012 Rule 3.1 In the file `xen/drivers/passthrough/arm/smmu-v3.c' there are a few occurrences of nested '//' character sequences inside C-style comment blocks, which violate Rule 3.1. The patch aims to resolve those by replacing the nested comments with equivalent constructs that do not violate the rule. Signed-off-by: Nicola Vetrini Acked-by: Rahul Singh Reviewed-by: Luca Fancellu Reviewed-by: Stefano Stabellini --- xen/drivers/passthrough/arm/smmu-v3.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c index 720aa69ff2..cdbb505134 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -1047,10 +1047,10 @@ static int arm_smmu_atc_inv_domain(struct arm_smmu_domain *smmu_domain, * before we read 'nr_ats_masters' in case of a concurrent call to * arm_smmu_enable_ats(): * - * // unmap() // arm_smmu_enable_ats() - * TLBI+SYNC atomic_inc(&nr_ats_masters); - * smp_mb(); [...] - * atomic_read(&nr_ats_masters); pci_enable_ats() // writel() + * --- unmap() --- --- arm_smmu_enable_ats() --- + * TLBI+SYNC atomic_inc(&nr_ats_masters); + * smp_mb(); [...] + * atomic_read(&nr_ats_masters); pci_enable_ats() (see writel()) * * Ensures that we always see the incremented 'nr_ats_masters' count if * ATS was enabled at the PCI device before completion of the TLBI.