diff --git a/xen/arch/arm/dummy.S b/xen/arch/arm/dummy.S
index 66eb31405e..c641e7adda 100644
--- a/xen/arch/arm/dummy.S
+++ b/xen/arch/arm/dummy.S
@@ -7,11 +7,7 @@ x:	.word 0xe7f000f0 /* Undefined instruction */
 x:	mov pc, lr
 	
 /* PIRQ support */
-DUMMY(alloc_pirq_struct);
 DUMMY(nr_irqs_gsi);
-DUMMY(pirq_guest_bind);
-DUMMY(pirq_guest_unbind);
-DUMMY(pirq_set_affinity);
 
 /* VCPU */
 NOP(update_vcpu_system_time);
diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c
index 72e83e6803..a50281b04b 100644
--- a/xen/arch/arm/irq.c
+++ b/xen/arch/arm/irq.c
@@ -191,6 +191,35 @@ out_no_end:
     irq_exit();
 }
 
+/*
+ * pirq event channels. We don't use these on ARM, instead we use the
+ * features of the GIC to inject virtualised normal interrupts.
+ */
+struct pirq *alloc_pirq_struct(struct domain *d)
+{
+    return NULL;
+}
+
+/*
+ * These are all unreachable given an alloc_pirq_struct
+ * which returns NULL, all callers try to lookup struct pirq first
+ * which will fail.
+ */
+int pirq_guest_bind(struct vcpu *v, struct pirq *pirq, int will_share)
+{
+    BUG();
+}
+
+void pirq_guest_unbind(struct domain *d, struct pirq *pirq)
+{
+    BUG();
+}
+
+void pirq_set_affinity(struct domain *d, int pirq, const cpumask_t *mask)
+{
+    BUG();
+}
+
 /*
  * Local variables:
  * mode: C