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x86/HVM: grow MMIO cache data size to 64 bytes
This is needed before enabling any AVX512 insns in the emulator. Change the way alignment is enforced at the same time. Add a check that the buffer won't actually overflow, and while at it also convert the check for accesses to not cross page boundaries. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Paul Durrant <paul.durrant@citrix.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
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@@ -876,7 +876,18 @@ static int hvmemul_phys_mmio_access(
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int rc = X86EMUL_OKAY;
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/* Accesses must fall within a page. */
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BUG_ON((gpa & ~PAGE_MASK) + size > PAGE_SIZE);
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if ( (gpa & ~PAGE_MASK) + size > PAGE_SIZE )
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{
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ASSERT_UNREACHABLE();
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return X86EMUL_UNHANDLEABLE;
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}
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/* Accesses must not overflow the cache's buffer. */
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if ( size > sizeof(cache->buffer) )
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{
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ASSERT_UNREACHABLE();
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return X86EMUL_UNHANDLEABLE;
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}
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/*
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* hvmemul_do_io() cannot handle non-power-of-2 accesses or
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@@ -42,15 +42,14 @@ struct hvm_vcpu_asid {
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};
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/*
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* We may read or write up to m256 as a number of device-model
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* We may read or write up to m512 as a number of device-model
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* transactions.
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*/
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struct hvm_mmio_cache {
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unsigned long gla;
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unsigned int size;
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uint8_t dir;
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uint8_t pad[3]; /* make buffer[] long-aligned */
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uint8_t buffer[32];
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uint8_t buffer[64] __aligned(sizeof(long));
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};
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struct hvm_vcpu_io {
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