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x86/pv: Fix up erroneous segments for 32bit syscall entry
The existing FLAT_KERNEL_SS expands to the correct value, 0xe02b, but is the wrong constant to use. Switch to FLAT_USER_SS32. For compat domains however, the reported values are entirely bogus. FLAT_USER_SS32 (value 0xe02b) is FLAT_RING3_CS in the 32bit ABI, while FLAT_USER_CS32 (value 0xe023) is FLAT_RING1_DS with an RPL of 3. The guests SYSCALL callback is invoked with a broken iret frame, and if left unmodified by the guest, will fail on the way back out when Xen's iret tries to load a code segment into %ss. In practice, this is only a problem for 32bit PV guests on AMD hardware, as Intel hardware doesn't permit the SYSCALL instruction outside of 64bit mode. This appears to have been broken ever since 64bit support was added to Xen, and has gone unnoticed because Linux doesn't use SYSCALL in 32bit builds. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Wei Liu <wei.liu2@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> Release-acked-by: Juergen Gross <jgross@suse.com>
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+6
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@@ -197,7 +197,7 @@ ENTRY(cstar_enter)
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/* sti could live here when we don't switch page tables below. */
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CR4_PV32_RESTORE
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movq 8(%rsp),%rax /* Restore %rax. */
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movq $FLAT_KERNEL_SS,8(%rsp)
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movq $FLAT_USER_SS32, 8(%rsp) /* Assume a 64bit domain. Compat handled lower. */
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pushq %r11
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pushq $FLAT_USER_CS32
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pushq %rcx
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@@ -223,6 +223,11 @@ ENTRY(cstar_enter)
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movq VCPU_domain(%rbx),%rcx
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cmpb $0,DOMAIN_is_32bit_pv(%rcx)
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je switch_to_kernel
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/* Fix up reported %cs/%ss for compat domains. */
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movl $FLAT_COMPAT_USER_SS, UREGS_ss(%rsp)
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movl $FLAT_COMPAT_USER_CS, UREGS_cs(%rsp)
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cmpb $0,VCPU_syscall32_disables_events(%rbx)
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movzwl VCPU_syscall32_sel(%rbx),%esi
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movq VCPU_syscall32_addr(%rbx),%rax
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