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xen: Expose the PMU to the guests
Add parameter vpmu to xl domain configuration syntax to enable the access to PMU registers by disabling the PMU traps(currently only for ARM). The current status is that the PMU registers are not virtualized and the physical registers are directly accessible when this parameter is enabled. There is no interrupt support and Xen will not save/restore the register values on context switches. According to Arm Arm, section D7.1: "The Performance Monitors Extension is common to AArch64 operation and AArch32 operation." That means we have an ensurance that if PMU is present in one exception state, it must also be present in the other. Please note that this feature is experimental. Signed-off-by: Michal Orzel <michal.orzel@arm.com> Signed-off-by: Julien Grall <julien@xen.org> Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Ian Jackson <iwj@xenproject.org>
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@@ -1119,6 +1119,9 @@ return fmt.Errorf("converting field ArchX86.MsrRelaxed: %v", err)
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}
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x.Altp2M = Altp2MMode(xc.altp2m)
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x.VmtraceBufKb = int(xc.vmtrace_buf_kb)
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if err := x.Vpmu.fromC(&xc.vpmu);err != nil {
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return fmt.Errorf("converting field Vpmu: %v", err)
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}
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return nil}
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@@ -1600,6 +1603,9 @@ return fmt.Errorf("converting field ArchX86.MsrRelaxed: %v", err)
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}
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xc.altp2m = C.libxl_altp2m_mode(x.Altp2M)
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xc.vmtrace_buf_kb = C.int(x.VmtraceBufKb)
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if err := x.Vpmu.toC(&xc.vpmu); err != nil {
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return fmt.Errorf("converting field Vpmu: %v", err)
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}
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return nil
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}
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@@ -521,6 +521,7 @@ MsrRelaxed Defbool
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}
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Altp2M Altp2MMode
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VmtraceBufKb int
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Vpmu Defbool
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}
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type DomainBuildInfoTypeUnion interface {
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