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x86/ioapic: Don't open-code 32-bits rte reads
There are many places where we use interesting ways of reading 32-bits components of the RTE. Introduce and use low and high components directly to the rte structure instead. Also take the opportunity to simplify "x & 1 ? 1 : 0". Signed-off-by: Teddy Astie <teddy.astie@vates.tech> Acked-by: Jan Beulich <jbeulich@suse.com>
This commit is contained in:
Teddy Astie authored and Jan Beulich committed
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commit
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3 files changed
+14
-23
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@@ -122,6 +122,7 @@ struct IO_APIC_route_entry {
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} dest;
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};
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uint64_t raw;
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struct { uint32_t low, high; };
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};
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};
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+11
-18
@@ -254,28 +254,23 @@ nomem:
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return NULL;
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}
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union entry_union {
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struct { u32 w1, w2; };
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struct IO_APIC_route_entry entry;
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};
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struct IO_APIC_route_entry __ioapic_read_entry(
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unsigned int apic, unsigned int pin, bool raw)
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{
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union entry_union eu;
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struct IO_APIC_route_entry entry;
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if ( raw || !iommu_intremap )
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{
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eu.w1 = __io_apic_read(apic, 0x10 + 2 * pin);
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eu.w2 = __io_apic_read(apic, 0x11 + 2 * pin);
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entry.low = __io_apic_read(apic, 0x10 + 2 * pin);
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entry.high = __io_apic_read(apic, 0x11 + 2 * pin);
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}
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else
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{
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eu.w1 = iommu_read_apic_from_ire(apic, 0x10 + 2 * pin);
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eu.w2 = iommu_read_apic_from_ire(apic, 0x11 + 2 * pin);
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entry.low = iommu_read_apic_from_ire(apic, 0x10 + 2 * pin);
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entry.high = iommu_read_apic_from_ire(apic, 0x11 + 2 * pin);
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}
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return eu.entry;
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return entry;
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}
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static struct IO_APIC_route_entry ioapic_read_entry(
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@@ -294,12 +289,10 @@ void __ioapic_write_entry(
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unsigned int apic, unsigned int pin, bool raw,
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struct IO_APIC_route_entry e)
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{
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union entry_union eu = { .entry = e };
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if ( raw || !iommu_intremap )
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{
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__io_apic_write(apic, 0x11 + 2 * pin, eu.w2);
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__io_apic_write(apic, 0x10 + 2 * pin, eu.w1);
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__io_apic_write(apic, 0x11 + 2 * pin, e.high);
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__io_apic_write(apic, 0x10 + 2 * pin, e.low);
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/*
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* Might be called before io_apic_pin_eoi is allocated. Entry will be
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* initialized to the RTE value once the cache is allocated.
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@@ -2218,7 +2211,7 @@ int ioapic_guest_read(unsigned long physbase, unsigned int reg, u32 *pval)
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dprintk(XENLOG_INFO, "IO-APIC: apic=%d, pin=%d, irq=%d\n" \
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XENLOG_INFO "IO-APIC: new_entry=%08x\n" \
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XENLOG_INFO "IO-APIC: " f "\n", \
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apic, pin, irq, *(u32 *)&rte, ##a )
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apic, pin, irq, rte.low, ##a )
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int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
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{
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@@ -2237,7 +2230,7 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
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pin = (reg - 0x10) >> 1;
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/* Write first half from guest; second half is target info. */
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*(u32 *)&rte = val;
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rte.low = val;
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/*
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* What about weird destination types?
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@@ -2288,7 +2281,7 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
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ret = io_apic_read(apic, 0x10 + 2 * pin);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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rte.vector = desc->arch.vector;
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if ( *(u32*)&rte != ret )
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if ( rte.low != ret )
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WARN_BOGUS_WRITE("old_entry=%08x pirq=%d\n" XENLOG_INFO
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"IO-APIC: Attempt to modify IO-APIC pin for in-use IRQ!",
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ret, pirq);
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@@ -399,7 +399,7 @@ unsigned int cf_check io_apic_read_remap_rte(
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unsigned int ioapic_pin = (reg - 0x10) / 2;
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int index;
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struct IO_APIC_route_entry old_rte = {};
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int rte_upper = (reg & 1) ? 1 : 0;
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bool rte_upper = reg & 1;
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struct vtd_iommu *iommu = ioapic_to_iommu(IO_APIC_ID(apic));
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if ( !iommu->intremap.num ||
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@@ -411,10 +411,7 @@ unsigned int cf_check io_apic_read_remap_rte(
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if ( remap_entry_to_ioapic_rte(iommu, index, &old_rte) )
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return __io_apic_read(apic, reg);
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if ( rte_upper )
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return (*(((u32 *)&old_rte) + 1));
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else
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return (*(((u32 *)&old_rte) + 0));
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return rte_upper ? old_rte.high : old_rte.low;
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}
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void cf_check io_apic_write_remap_rte(
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