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x86: allow reading MSR_IA32_TSC with XENPF_resource_op
Memory bandwidth monitoring requires system time information returned along with the monitoring counter to verify the correctness of the counter value and to calculate the time elapsed between two samplings. Add MSR_IA32_TSC to the read path and it returns scaled system time(ns) instead of raw timestamp to elimanate the needs to convert. The return time is obfuscated with booting random to eliminate the potential abuse of it. RESOURCE_ACCESS_MAX_ENTRIES is also increased to 3 so MSR_IA32_TSC can be used together with an MSR write/read operation pair. Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com> Fix uninitialized variable build error. Signed-off-by: Jan Beulich <jbeulich@suse.com>
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@@ -61,7 +61,7 @@ long cpu_down_helper(void *data);
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long core_parking_helper(void *data);
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uint32_t get_cur_idle_nums(void);
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#define RESOURCE_ACCESS_MAX_ENTRIES 2
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#define RESOURCE_ACCESS_MAX_ENTRIES 3
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struct xen_resource_access {
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unsigned int nr_done;
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unsigned int nr_entries;
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@@ -75,6 +75,7 @@ static bool_t allow_access_msr(unsigned int msr)
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/* MSR for CMT, refer to chapter 17.14 of Intel SDM. */
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case MSR_IA32_CMT_EVTSEL:
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case MSR_IA32_CMT_CTR:
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case MSR_IA32_TSC:
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return 1;
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}
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@@ -124,6 +125,7 @@ static void resource_access(void *info)
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{
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struct xen_resource_access *ra = info;
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unsigned int i;
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u64 tsc = 0;
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for ( i = 0; i < ra->nr_done; i++ )
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{
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@@ -133,10 +135,40 @@ static void resource_access(void *info)
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switch ( entry->u.cmd )
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{
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case XEN_RESOURCE_OP_MSR_READ:
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ret = rdmsr_safe(entry->idx, entry->val);
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if ( unlikely(entry->idx == MSR_IA32_TSC) )
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{
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/* Return obfuscated scaled time instead of raw timestamp */
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entry->val = get_s_time_fixed(tsc)
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+ SECONDS(boot_random) - boot_random;
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ret = 0;
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}
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else
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{
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unsigned long flags = 0;
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/*
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* If next entry is MSR_IA32_TSC read, then the actual rdtscll
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* is performed together with current entry, with IRQ disabled.
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*/
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bool_t read_tsc = (i < ra->nr_done - 1 &&
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unlikely(entry[1].idx == MSR_IA32_TSC));
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if ( unlikely(read_tsc) )
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local_irq_save(flags);
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ret = rdmsr_safe(entry->idx, entry->val);
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if ( unlikely(read_tsc) )
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{
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rdtscll(tsc);
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local_irq_restore(flags);
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}
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}
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break;
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case XEN_RESOURCE_OP_MSR_WRITE:
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ret = wrmsr_safe(entry->idx, entry->val);
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if ( unlikely(entry->idx == MSR_IA32_TSC) )
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ret = -EPERM;
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else
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ret = wrmsr_safe(entry->idx, entry->val);
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break;
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default:
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BUG();
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@@ -1,9 +1,11 @@
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#include <xen/init.h>
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#include <xen/percpu.h>
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#include <xen/random.h>
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#include <xen/time.h>
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#include <asm/random.h>
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static DEFINE_PER_CPU(unsigned int, seed);
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unsigned int __read_mostly boot_random;
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unsigned int get_random(void)
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{
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@@ -27,3 +29,10 @@ unsigned int get_random(void)
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return val;
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}
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static int __init init_boot_random(void)
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{
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boot_random = get_random();
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return 0;
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}
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__initcall(init_boot_random);
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@@ -540,6 +540,16 @@ DEFINE_XEN_GUEST_HANDLE(xenpf_core_parking_t);
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#define XEN_RESOURCE_OP_MSR_READ 0
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#define XEN_RESOURCE_OP_MSR_WRITE 1
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/*
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* Specially handled MSRs:
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* - MSR_IA32_TSC
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* READ: Returns the scaled system time(ns) instead of raw timestamp. In
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* multiple entry case, if other MSR read is followed by a MSR_IA32_TSC
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* read, then both reads are guaranteed to be performed atomically (with
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* IRQ disabled). The return time indicates the point of reading that MSR.
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* WRITE: Not supported.
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*/
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struct xenpf_resource_entry {
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union {
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uint32_t cmd; /* IN: XEN_RESOURCE_OP_* */
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@@ -3,4 +3,7 @@
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unsigned int get_random(void);
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/* The value keeps unchange once initialized for each booting */
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extern unsigned int boot_random;
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#endif /* __XEN_RANDOM_H__ */
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