The original gdb server patch will cause the new vmx guest break the=20
old one. This patch make the arch_set_guest_info modify the correct
vmcs and also skip modifying during creating.
Signed-off-by: Xiaofeng Ling <xiaofeng.ling@intel.com>^
Signed-off-by: Arun Sharma <arun.sharma@intel.com>
Without this, we may be saving the IDT info from the wrong cpu into the
vmcs.
This makes domU work in the presence of VMX domains on SMP/HT enabled
machines.
Signed-off-by: Chengyuan Li <chengyuan.li@intel.com>
Signed-off-by: Xiaofeng Ling <xiaofeng.ling@intel.com>=20
Signed-off-by: Arun Sharma <arun.sharma@intel.com>
Right now, we have an exposure between the time the MSR is written
and used by an instruction such as syscall. If there is a context
switch and we do vmx_do_restore_msrs(), everything goes fine. But
if we don't, then we execute the syscall with the wrong MSR.
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
Signed-off-by: Arun Sharma <arun.sharma@intel.com>
Based on an initial patch from Don Fry at IBM.
Still TODO:
1. Testing
2. NTP synchronisation
3. Fix wallclock interface a bit
4. Support for platform timers other than PIT (e.g., HPET, IBM Cyclone)
5. Scale 64-bit TSC diffs instead of 32-bit, just for sanity
6. Error-correcting scale factor is still slightly wrong
6. More testing
Signed-off-by: Keir Fraser <keir@xensource.com>
Pull out PAL_VM_SUMMARY, reimplement later
Turn off ar.unat code in fast paths by default for now
Fix vcpu_fc
Signed-off by: Dan Magenheimer <dan.magenheimer@hp.com>
Not all vectors go through do_IRQ(). It's possible to look up the handler
in the IDT and call that one, but it'll result in two trap frames.
Signed-off-by: Xiaofeng Ling <xiaofeng.ling@intel.com>
Signed-off-by: Arun Sharma <arun.sharma@intel.com>
domU. The problem is that some code wrongly treat dom.max_memkb as in
byte unit, instead of KB unit. This patch fixs the problem.
Signed-off-by: Nguyen Anh Quynh <aquynh@gmail.com>
a patch to improve the VMCS control bits setting. It also adds checks to
detect any non-optimal or incompatible settings for the VMCS control
bits based on MSRs, and fixes a bug associated with vmcs region freeing.
Signed-off-by: Nitin A Kamble <nitin.a.kamble@intel.com>
Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>
Signed-off-by: Xin Li <xin.b.li@intel.com>
Setting this bit eliminates the calls to the vm86 monitor to handle
interrupts and exceptions that occur while executing programs in vm86
mode.
Signed-off-by: Asit Mallick <asit.k.mallick@intel.com>
Signed-off-by: Arun Sharma <arun.sharma@intel.com>
