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Andrew Cooper
b60ab42db2
With all other plumbing in place, activate shadow stacks when possible. Note that CET shares the similar problems to SMEP/SMAP with Ring1 being supervisor to the processor, and that the layout of the shadow stack differs between an IRET to Ring 1 and Ring 3. Therefore, we disable PV32 when CET is enabled. Compatibility can be maintained if necessary via PV-Shim. The BSP needs to wait until alternatives have run (to avoid interaction with CR0.WP), and after the first reset_stack_and_jump() to avoid having a pristine shadow stack interact in problematic ways with an in-use regular stack. Activate shadow stack in reinit_bsp_stack(). APs have all infrastructure set up by the booting CPU, so enable shadow stacks before entering C. Adjust the logic to call start_secondary rather than jump to it, so stack traces make more sense. The crash path needs to turn CET off to avoid interfering with the crash kernel's environment. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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