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When adding support for BAR assignments to addresses above 4G, the MTRR side of things was left out. Additionally the MMIO ranges in the DSDT's \_SB.PCI0._CRS were having memory types not matching the ones put into MTRRs: The legacy VGA range is supposed to be WC, and the other ones should be UC. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Ian Campbell <ian.campbell@citrix.com>
96 lines
2.7 KiB
C
96 lines
2.7 KiB
C
#ifndef __HVMLOADER_CONFIG_H__
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#define __HVMLOADER_CONFIG_H__
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#include <stdint.h>
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enum virtual_vga { VGA_none, VGA_std, VGA_cirrus, VGA_pt };
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extern enum virtual_vga virtual_vga;
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extern unsigned long igd_opregion_pgbase;
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#define IGD_OPREGION_PAGES 3
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struct bios_config {
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const char *name;
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/* BIOS ROM image bits */
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void *image;
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unsigned int image_size;
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/* Physical address to load at */
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unsigned int bios_address;
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/* ROMS */
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void (*load_roms)(void);
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void (*bios_load)(const struct bios_config *config);
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void (*bios_info_setup)(void);
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void (*bios_info_finish)(void);
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void (*e820_setup)(void);
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void (*acpi_build_tables)(void);
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void (*create_mp_tables)(void);
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void (*create_smbios_tables)(void);
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void (*create_pir_tables)(void);
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};
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extern struct bios_config rombios_config;
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extern struct bios_config seabios_config;
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extern struct bios_config ovmf_config;
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#define PAGE_SHIFT 12
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#define PAGE_SIZE (1ul << PAGE_SHIFT)
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#define IOAPIC_BASE_ADDRESS 0xfec00000
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#define IOAPIC_ID 0x01
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#define IOAPIC_VERSION 0x11
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#define LAPIC_BASE_ADDRESS 0xfee00000
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#define LAPIC_ID(vcpu_id) ((vcpu_id) * 2)
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#define PCI_ISA_DEVFN 0x08 /* dev 1, fn 0 */
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#define PCI_ISA_IRQ_MASK 0x0c20U /* ISA IRQs 5,10,11 are PCI connected */
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/* MMIO hole: Hardcoded defaults, which can be dynamically expanded. */
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#define PCI_MEM_START 0xf0000000
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#define PCI_MEM_END 0xfc000000
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extern unsigned long pci_mem_start, pci_mem_end;
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extern uint64_t pci_hi_mem_start, pci_hi_mem_end;
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/* Memory map. */
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#define SCRATCH_PHYSICAL_ADDRESS 0x00010000
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#define HYPERCALL_PHYSICAL_ADDRESS 0x00080000
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#define VGABIOS_PHYSICAL_ADDRESS 0x000C0000
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#define HVMLOADER_PHYSICAL_ADDRESS 0x00100000
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/* Special BIOS mappings, etc. are allocated from here upwards... */
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#define RESERVED_MEMBASE 0xFC000000
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/* NB. ACPI_INFO_PHYSICAL_ADDRESS *MUST* match definition in acpi/dsdt.asl! */
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#define ACPI_INFO_PHYSICAL_ADDRESS 0xFC000000
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#define RESERVED_MEMORY_DYNAMIC_START 0xFC001000
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#define RESERVED_MEMORY_DYNAMIC_END 0xFE000000
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/*
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* GUEST_RESERVED: Physical address space reserved for guest use.
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* This is not dynamically advertised to guests, so this range must *never*
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* be used for any purpose by us, in future. It must always be marked as
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* reserved in the memory map (e.g., E820_RESERVED) so that mechanisms such
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* as PCI BAR remapping do not allocate from this region.
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*/
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#define GUEST_RESERVED_START 0xFE700000
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#define GUEST_RESERVED_END 0xFE800000
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extern unsigned long scratch_start;
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#endif /* __HVMLOADER_CONFIG_H__ */
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/*
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* Local variables:
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* mode: C
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* c-file-style: "BSD"
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* c-basic-offset: 4
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* tab-width: 4
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* indent-tabs-mode: nil
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* End:
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*/
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