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Andrew Cooper
2280b0ee2a
AMD have specified new CPUID bits relating to SRSO. * SRSO_NO indicates that hardware is no longer vulnerable to SRSO. * IBPB_BRTYPE indicates that IBPB flushes branch type information too. * SBPB indicates support for a relaxed form of IBPB that does not flush branch type information. Current CPUs (Zen4 and older) are not expected to enumerate these bits. Native software is expected to synthesise them for guests using model and microcode revision checks. Two are just status bits, and SBPB is trivial to support for guests by tweaking the reserved bit calculation in guest_wrmsr() and feature dependencies. Expose all by default to guests, so they start showing up when Xen synthesises them. While adding feature dependenies for IBPB, fix up an overlooked issue from XSA-422. It's inappropriate to advertise that IBPB flushes RET predictions if IBPB is unavailable itself. This is part of XSA-434 / CVE-2023-20569 Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>