Andrew Cooper 227e68a9bf RISCV: Activate UBSAN in testing ...

RISC-V has less complicated headers, so update ubsan.c to pull in everything
it needs.  Provide dump_execution_state(), and update the printk() message to
make it more obvious that it's an outstanding task.

As with commit 8ef2ac727e ("automation: enable UBSAN for debug tests"),
enable UBSAN in RISC-V testing too.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Release-Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>

2025-02-10 23:40:12 +00:00

..

analyze.yaml

automation/eclair_analysis: unblock pipelines from certain repositories

2024-05-09 18:19:49 +01:00

build-each-commit.sh

automation: Rework "build-each-commit-gcc" test

2024-02-26 16:05:59 +01:00

build.yaml

RISCV: Activate UBSAN in testing

2025-02-10 23:40:12 +00:00

containers.yaml

CI: New stage "containers" to rebuild some containers

2024-11-19 13:47:25 -08:00

test.yaml

CI: Define XEN_REGISTRY variable

2024-11-19 13:45:58 -08:00