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The if_changed macro from Linux, in addition to check if any files
needs an update, check if the command line has changed since the last
invocation. The latter will force a rebuild if any options to the
executable have changed.
if_changed_rule checks dependencies like if_changed, but execute
rule_$(1) instead of cmd_$(1) when a target needs to be rebuilt. A rule_
macro can call more than one cmd_ macro. One of the cmd_ macro in a
rule need to be call using a macro that record the command line, so
cmd_and_record is introduced. It is similar to cmd_and_fixup from
Linux but without a call to fixdep which we don't have yet. (We will
later replace cmd_and_record by cmd_and_fixup.)
Example of a rule_ macro:
define rule_cc_o_c
$(call cmd_and_record,cc_o_o)
$(call cmd,objcopy)
endef
This needs one of the call to use cmd_and_record, otherwise no .*.cmd
file will be created, and the target will keep been rebuilt.
In order for if_changed to works correctly, we need to load the .%.cmd
files that the macro generates, this is done by adding targets in to
the $(targets) variable. We use intermediate_targets to add %.init.o
dependency %.o to target since there aren't in obj-y.
We also add $(MAKECMDGOALS) to targets so that when running for
example `make common/memory.i`, make will load the associated .%.cmd
dependency file.
Beside the if_changed*, we import the machinery used for a "beautify
output". The important one is when running make with V=2 which help to
debug the makefiles by printing why a target is been rebuilt, via the
$(echo-why) macro.
if_changed and if_changed_rule aren't used yet.
Most of this code is copied from Linux v5.4, including the
documentation.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
186 lines
5.3 KiB
ReStructuredText
186 lines
5.3 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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=============
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Xen Makefiles
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=============
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Documentation for the build system of Xen, found in xen.git/xen/.
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Makefile files
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==============
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Description of the syntax that can be used in most Makefiles named
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'Makefile'. ('xen/Makefile' isn't part of the description.)
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'Makefile's are consumed by 'Rules.mk' when building.
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Goal definitions
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----------------
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Goal definitions are the main part (heart) of the Makefile.
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These lines define the files to be built, any special compilation
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options, and any subdirectories to be entered recursively.
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The most simple makefile contains one line:
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Example::
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obj-y += foo.o
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This tells the build system that there is one object in that
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directory, named foo.o. foo.o will be built from foo.c or foo.S.
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The following pattern is often used to have object selected
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depending on the configuration:
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Example::
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obj-$(CONFIG_FOO) += foo.o
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$(CONFIG_FOO) can evaluates to y.
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If CONFIG_FOO is not y, then the file will not be compiled nor linked.
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Descending down in directories
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------------------------------
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A Makefile is only responsible for building objects in its own
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directory. Files in subdirectories should be taken care of by
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Makefiles in these subdirs. The build system will automatically
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invoke make recursively in subdirectories, provided you let it know of
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them.
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To do so, obj-y is used.
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acpi lives in a separate directory, and the Makefile present in
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drivers/ tells the build system to descend down using the following
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assignment.
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Example::
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#drivers/Makefile
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obj-$(CONFIG_ACPI) += acpi/
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If CONFIG_ACPI is set to 'y'
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the corresponding obj- variable will be set, and the build system
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will descend down in the apci directory.
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The build system only uses this information to decide that it needs
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to visit the directory, it is the Makefile in the subdirectory that
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specifies what is modular and what is built-in.
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It is good practice to use a `CONFIG_` variable when assigning directory
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names. This allows the build system to totally skip the directory if the
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corresponding `CONFIG_` option is 'y'.
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Compilation flags
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-----------------
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CFLAGS-y and AFLAGS-y
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These two flags apply only to the makefile in which they
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are assigned. They are used for all the normal cc, as and ld
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invocations happening during a recursive build.
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$(CFLAGS-y) is necessary because the top Makefile owns the
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variable $(XEN_CFLAGS) and uses it for compilation flags for the
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entire tree. And the variable $(CFLAGS) is modified by Config.mk
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which evaluated in every subdirs.
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CFLAGS-y specifies options for compiling with $(CC).
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AFLAGS-y specifies assembler options.
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Build system infrastructure
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===========================
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This chapter describe some of the macro used when building Xen.
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Macros
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------
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if_changed
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if_changed is the infrastructure used for the following commands.
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Usage::
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target: source(s) FORCE
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$(call if_changed,ld/objcopy/...)
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When the rule is evaluated, it is checked to see if any files
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need an update, or the command line has changed since the last
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invocation. The latter will force a rebuild if any options
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to the executable have changed.
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Any target that utilises if_changed must be listed in $(targets),
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otherwise the command line check will fail, and the target will
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always be built.
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if_changed may be used in conjunction with custom commands as
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defined in "Custom commands".
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Note: It is a typical mistake to forget the FORCE prerequisite.
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Another common pitfall is that whitespace is sometimes
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significant; for instance, the below will fail (note the extra space
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after the comma)::
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target: source(s) FORCE
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**WRONG!** $(call if_changed, ld/objcopy/...)
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Note:
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if_changed should not be used more than once per target.
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It stores the executed command in a corresponding .cmd file
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and multiple calls would result in overwrites and unwanted
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results when the target is up to date and only the tests on
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changed commands trigger execution of commands.
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ld
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Link target.
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Example::
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targets += setup setup.o bootsect bootsect.o
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$(obj)/setup $(obj)/bootsect: %: %.o FORCE
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$(call if_changed,ld)
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$(targets) are assigned all potential targets, by which the build
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system knows the targets and will:
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1) check for commandline changes
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The ": %: %.o" part of the prerequisite is a shorthand that
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frees us from listing the setup.o and bootsect.o files.
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Note:
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It is a common mistake to forget the "targets :=" assignment,
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resulting in the target file being recompiled for no
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obvious reason.
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objcopy
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Copy binary. Uses OBJCOPYFLAGS usually specified in
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arch/$(ARCH)/Makefile.
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Custom commands
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---------------
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When the build system is executing with V=0, then only
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a shorthand of a command is normally displayed.
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To enable this behaviour for custom commands, two variables are
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required to be set::
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quiet_cmd_<command> - what shall be echoed
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cmd_<command> - the command to execute
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Example::
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# xsm/flask/Makefile
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mkflask := policy/mkflask.sh
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quiet_cmd_mkflask = MKFLASK $@
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cmd_mkflask = $(CONFIG_SHELL) $(mkflask) $(AWK) include \
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$(FLASK_H_DEPEND)
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include/flask.h: $(FLASK_H_DEPEND) $(mkflask) FORCE
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$(call if_changed,mkflask)
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When updating the include/flask.h target, the line:
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MKFLASK include/flask.h
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will be displayed with "make V=0". (V=0 is the default)
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