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Juergen Gross
e48e33e219
Today the maximum record lenth in a migration stream is 8MB. This limits the size of a PV domain to a little bit less than 1TB in the migration case, as the P2M frame list will exceed 8MB in this case. Raising the record size limit by a factor of 16 allows for domain sizes of nearly 16TB to be migrated. This ought to be enough. Signed-off-by: Juergen Gross <jgross@suse.com> Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
151 lines
3.2 KiB
C
151 lines
3.2 KiB
C
#ifndef __STREAM_FORMAT__H
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#define __STREAM_FORMAT__H
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/*
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* C structures for the Migration v2 stream format.
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* See docs/specs/libxc-migration-stream.pandoc
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*/
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#include <inttypes.h>
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/*
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* Image Header
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*/
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struct xc_sr_ihdr
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{
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uint64_t marker;
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uint32_t id;
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uint32_t version;
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uint16_t options;
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uint16_t _res1;
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uint32_t _res2;
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};
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#define IHDR_MARKER 0xffffffffffffffffULL
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#define IHDR_ID 0x58454E46U
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#define IHDR_VERSION 2
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#define _IHDR_OPT_ENDIAN 0
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#define IHDR_OPT_LITTLE_ENDIAN (0 << _IHDR_OPT_ENDIAN)
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#define IHDR_OPT_BIG_ENDIAN (1 << _IHDR_OPT_ENDIAN)
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/*
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* Domain Header
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*/
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struct xc_sr_dhdr
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{
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uint32_t type;
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uint16_t page_shift;
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uint16_t _res1;
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uint32_t xen_major;
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uint32_t xen_minor;
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};
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#define DHDR_TYPE_X86_PV 0x00000001U
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#define DHDR_TYPE_X86_HVM 0x00000002U
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#define DHDR_TYPE_X86_PVH 0x00000003U
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#define DHDR_TYPE_ARM 0x00000004U
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/*
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* Record Header
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*/
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struct xc_sr_rhdr
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{
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uint32_t type;
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uint32_t length;
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};
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/* All records must be aligned up to an 8 octet boundary */
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#define REC_ALIGN_ORDER (3U)
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/* Somewhat arbitrary - 128MB */
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#define REC_LENGTH_MAX (128U << 20)
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#define REC_TYPE_END 0x00000000U
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#define REC_TYPE_PAGE_DATA 0x00000001U
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#define REC_TYPE_X86_PV_INFO 0x00000002U
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#define REC_TYPE_X86_PV_P2M_FRAMES 0x00000003U
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#define REC_TYPE_X86_PV_VCPU_BASIC 0x00000004U
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#define REC_TYPE_X86_PV_VCPU_EXTENDED 0x00000005U
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#define REC_TYPE_X86_PV_VCPU_XSAVE 0x00000006U
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#define REC_TYPE_SHARED_INFO 0x00000007U
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#define REC_TYPE_TSC_INFO 0x00000008U
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#define REC_TYPE_HVM_CONTEXT 0x00000009U
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#define REC_TYPE_HVM_PARAMS 0x0000000aU
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#define REC_TYPE_TOOLSTACK 0x0000000bU
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#define REC_TYPE_X86_PV_VCPU_MSRS 0x0000000cU
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#define REC_TYPE_VERIFY 0x0000000dU
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#define REC_TYPE_CHECKPOINT 0x0000000eU
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#define REC_TYPE_CHECKPOINT_DIRTY_PFN_LIST 0x0000000fU
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#define REC_TYPE_OPTIONAL 0x80000000U
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/* PAGE_DATA */
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struct xc_sr_rec_page_data_header
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{
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uint32_t count;
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uint32_t _res1;
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uint64_t pfn[0];
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};
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#define PAGE_DATA_PFN_MASK 0x000fffffffffffffULL
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#define PAGE_DATA_TYPE_MASK 0xf000000000000000ULL
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/* X86_PV_INFO */
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struct xc_sr_rec_x86_pv_info
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{
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uint8_t guest_width;
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uint8_t pt_levels;
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uint8_t _res[6];
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};
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/* X86_PV_P2M_FRAMES */
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struct xc_sr_rec_x86_pv_p2m_frames
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{
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uint32_t start_pfn;
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uint32_t end_pfn;
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uint64_t p2m_pfns[0];
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};
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/* X86_PV_VCPU_{BASIC,EXTENDED,XSAVE,MSRS} */
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struct xc_sr_rec_x86_pv_vcpu_hdr
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{
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uint32_t vcpu_id;
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uint32_t _res1;
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uint8_t context[0];
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};
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/* TSC_INFO */
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struct xc_sr_rec_tsc_info
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{
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uint32_t mode;
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uint32_t khz;
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uint64_t nsec;
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uint32_t incarnation;
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uint32_t _res1;
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};
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/* HVM_PARAMS */
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struct xc_sr_rec_hvm_params_entry
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{
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uint64_t index;
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uint64_t value;
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};
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struct xc_sr_rec_hvm_params
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{
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uint32_t count;
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uint32_t _res1;
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struct xc_sr_rec_hvm_params_entry param[0];
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};
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#endif
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/*
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* Local variables:
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* mode: C
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* c-file-style: "BSD"
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* c-basic-offset: 4
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* tab-width: 4
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* indent-tabs-mode: nil
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* End:
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*/
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