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BIOS. Current Xen hard coded VGA ROM at 0xC0000 and etherboot ROM at 0xD0000. This makes the space in [0xC0000 - 0xDFFFF] to be fragments, which makes it hard to find enough space to hold another Option ROM. Signed-off-by: Shan Haitao <haitao.shan@intel.com>
44 lines
1.3 KiB
C
44 lines
1.3 KiB
C
#ifndef __HVMLOADER_CONFIG_H__
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#define __HVMLOADER_CONFIG_H__
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#define IOAPIC_BASE_ADDRESS 0xfec00000
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#define IOAPIC_ID 0x01
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#define IOAPIC_VERSION 0x11
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#define LAPIC_BASE_ADDRESS 0xfee00000
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#define LAPIC_ID(vcpu_id) ((vcpu_id) * 2)
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#define PCI_ISA_DEVFN 0x08 /* dev 1, fn 0 */
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#define PCI_ISA_IRQ_MASK 0x0c20U /* ISA IRQs 5,10,11 are PCI connected */
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#define PCI_MEMBASE 0xf0000000
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#define PCI_MEMSIZE 0x0c000000
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#define ROMBIOS_SEG 0xF000
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#define ROMBIOS_BEGIN 0x000F0000
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#define ROMBIOS_SIZE 0x00010000
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#define ROMBIOS_MAXOFFSET 0x0000FFFF
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#define ROMBIOS_END (ROMBIOS_BEGIN + ROMBIOS_SIZE)
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/* Memory map. */
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#define HYPERCALL_PHYSICAL_ADDRESS 0x00080000
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#define VGABIOS_PHYSICAL_ADDRESS 0x000C0000
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#define SMBIOS_PHYSICAL_ADDRESS 0x000E9000
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#define SMBIOS_MAXIMUM_SIZE 0x00001000
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#define ACPI_PHYSICAL_ADDRESS 0x000EA000
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#define ROMBIOS_PHYSICAL_ADDRESS 0x000F0000
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#define SCRATCH_PHYSICAL_ADDRESS 0x00010000
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/* Xen Platform Device */
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#define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
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struct bios_info {
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uint8_t com1_present:1;
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uint8_t com2_present:1;
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uint8_t hpet_present:1;
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uint32_t pci_min, pci_len;
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uint16_t xen_pfiob;
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};
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#endif /* __HVMLOADER_CONFIG_H__ */
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