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Zihintpause is in required_extensions[] so Xen panics when it is missing, while it does not strictly require hardware support for it. The PAUSE hint (Zihintpause extension) is encoded as FENCE W, 0 (0x0100000F). In accordance with the RISC-V Unprivileged ISA, HINTs are encoded in the space of valid standard instructions. On platforms without Zihintpause support, executing 0x0100000F is treated as a standard FENCE with an empty successor set, which acts as a NOP and never generates an illegal instruction trap. Zihintpause is therefore purely an optimization hint. Drop it from required_extensions[] so Xen can still boot on systems that don't advertise it, and print a warning in that case. Assisted-by: Claude:claude-opus-5 Signed-off-by: Baptiste Le Duc <baptiste.le-duc@vates.tech> Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
38 lines
1.5 KiB
Plaintext
38 lines
1.5 KiB
Plaintext
System requirements
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===================
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The following extensions are required by Xen. Xen panics at boot if any of
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them is missing from the riscv,isa property of the CPU nodes:
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- I, M, A, Zicsr, Zifencei:
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Base ISA Xen is compiled for.
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- C:
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Required only when Xen is built with CONFIG_RISCV_ISA_C=y.
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- H:
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Provides additional instructions and CSRs that control the new stage of
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address translation and support hosting a guest OS in virtual S-mode
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(VS-mode).
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- Zbb:
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RISC-V doesn't have a CLZ instruction in the base ISA.
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As a consequence, __builtin_ffs() emits a library call to ffs() on GCC,
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or a de Bruijn sequence on Clang.
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Zbb extension adds a CLZ instruction, after which __builtin_ffs() emits
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a very simple sequence.
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The similar issue occurs with other __builtin_<bitop>, so it is needed to
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provide a generic version of bitops in RISC-V bitops.h
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- Svpbmt:
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Mandatory to enable changing the memory attributes of a page.
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For platforms that do not support Svpbmt, it is necessary to introduce a
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similar mechanism as described in:
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https://lore.kernel.org/all/20241102000843.1301099-1-samuel.holland@sifive.com/
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Note: this list must be kept in sync with required_extensions[] in
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xen/arch/riscv/cpufeature.c.
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Optional extensions
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===================
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Other extensions recognised by Xen are listed in riscv_isa_ext[] in
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xen/arch/riscv/cpufeature.c. Xen uses them when present, but they are not
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needed to boot. The second column of that table says whether the extension
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is also exposed to guests.
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