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Keir Fraser
8a067f68b1
x86 IOMMU support added a lot of assumptions about what PCI buses look
like and where to find bridge devices. On ia64, we don't yet have
virtualization friendly IOMMUs, so for the moment, we just want to
keep "unsafe" PV PCI pass through working as well as it did in Xen
3.2. Looking at the code, it almost seems like x86 has thrown out
support for the old style driver domain. Things that don't
necessarily work on every PCI compliant architecture:
* You can't assume that just because there's a device at 01:01.0
that there's also a bridge at 01:00.0 and blow-up when you
don't find it. On HP ia64 boxes, PCI root bridges are not
necessarily exposed as a PCI device. This pretty much means
we can't call into any of the "FLR" code paths.
* BAR alignment: it's hard to have BAR alignment when your page
size is 16k. This wasn't a requirement for previous PV driver
domains, so I assume it's only for IOMMU support.
This is ugly, so I'm open to suggestions. It seems that all of these
architecture checks could be replaced by checking some "iommu_present"
variable to test whether the extra requirements are necessary.
Signed-off-by: Alex Williamson <alex.williamson@hp.com>
The file test.py here is from the Zope project, and is Copyright (c) 2001, 2002 Zope Corporation and Contributors. This file is released under the Zope Public License, version 2.0, a copy of which is in the file ZPL-2.0.