mirror of
https://github.com/xen-project/xen.git
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Keir Fraser
287d07f6a7
This tool will page out the specified number of pages from the specified domain. When a paged out page is accessed, Xen will issue a request and notify the tool over an event channel. The tool will process ther request, page the page in, and notify Xen. The current (default) policy tracks the 1024 most recently paged in pages and will not choose to evict any of those. This is done with the assumption that if a page is accessed, it is likely to be accessed again soon. Signed-off-by: Patrick Colp <Patrick.Colp@citrix.com>
449 lines
13 KiB
C
449 lines
13 KiB
C
#ifndef _X86_BITOPS_H
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#define _X86_BITOPS_H
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/*
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* Copyright 1992, Linus Torvalds.
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*/
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//#include <xen/config.h>
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#ifdef CONFIG_SMP
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#define LOCK_PREFIX "lock ; "
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#else
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#define LOCK_PREFIX ""
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#endif
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/*
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* We specify the memory operand as both input and output because the memory
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* operand is both read from and written to. Since the operand is in fact a
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* word array, we also specify "memory" in the clobbers list to indicate that
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* words other than the one directly addressed by the memory operand may be
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* modified. We don't use "+m" because the gcc manual says that it should be
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* used only when the constraint allows the operand to reside in a register.
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*/
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#define ADDR (*(volatile long *) addr)
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#define CONST_ADDR (*(const volatile long *) addr)
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extern void __bitop_bad_size(void);
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#define bitop_bad_size(addr) (sizeof(*(addr)) < 4)
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/**
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* set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This function is atomic and may not be reordered. See __set_bit()
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* if you do not require the atomic guarantees.
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void set_bit(int nr, volatile void *addr)
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{
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asm volatile (
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LOCK_PREFIX
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"btsl %1,%0"
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: "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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}
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#define set_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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set_bit(nr, addr); \
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})
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/**
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* __set_bit - Set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* Unlike set_bit(), this function is non-atomic and may be reordered.
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static inline void __set_bit(int nr, volatile void *addr)
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{
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asm volatile (
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"btsl %1,%0"
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: "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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}
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#define __set_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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__set_bit(nr, addr); \
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})
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/**
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* clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* clear_bit() is atomic and may not be reordered. However, it does
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* not contain a memory barrier, so if it is used for locking purposes,
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* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
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* in order to ensure changes are visible on other processors.
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*/
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static inline void clear_bit(int nr, volatile void *addr)
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{
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asm volatile (
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LOCK_PREFIX
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"btrl %1,%0"
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: "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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}
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#define clear_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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clear_bit(nr, addr); \
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})
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/**
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* __clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* Unlike clear_bit(), this function is non-atomic and may be reordered.
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static inline void __clear_bit(int nr, volatile void *addr)
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{
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asm volatile (
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"btrl %1,%0"
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: "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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}
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#define __clear_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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__clear_bit(nr, addr); \
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})
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#define smp_mb__before_clear_bit() ((void)0)
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#define smp_mb__after_clear_bit() ((void)0)
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/**
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* __change_bit - Toggle a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* Unlike change_bit(), this function is non-atomic and may be reordered.
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static inline void __change_bit(int nr, volatile void *addr)
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{
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asm volatile (
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"btcl %1,%0"
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: "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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}
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#define __change_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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__change_bit(nr, addr); \
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})
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/**
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* change_bit - Toggle a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* change_bit() is atomic and may not be reordered.
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static inline void change_bit(int nr, volatile void *addr)
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{
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asm volatile (
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LOCK_PREFIX
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"btcl %1,%0"
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: "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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}
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#define change_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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change_bit(nr, addr); \
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})
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/**
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* test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static inline int test_and_set_bit(int nr, volatile void *addr)
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{
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int oldbit;
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asm volatile (
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LOCK_PREFIX
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"btsl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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return oldbit;
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}
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#define test_and_set_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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test_and_set_bit(nr, addr); \
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})
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/**
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* __test_and_set_bit - Set a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is non-atomic and can be reordered.
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static inline int __test_and_set_bit(int nr, volatile void *addr)
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{
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int oldbit;
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asm volatile (
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"btsl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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return oldbit;
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}
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#define __test_and_set_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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__test_and_set_bit(nr, addr); \
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})
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/**
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* test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static inline int test_and_clear_bit(int nr, volatile void *addr)
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{
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int oldbit;
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asm volatile (
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LOCK_PREFIX
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"btrl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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return oldbit;
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}
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#define test_and_clear_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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test_and_clear_bit(nr, addr); \
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})
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/**
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* __test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is non-atomic and can be reordered.
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static inline int __test_and_clear_bit(int nr, volatile void *addr)
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{
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int oldbit;
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asm volatile (
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"btrl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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return oldbit;
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}
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#define __test_and_clear_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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__test_and_clear_bit(nr, addr); \
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})
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/* WARNING: non atomic and it can be reordered! */
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static inline int __test_and_change_bit(int nr, volatile void *addr)
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{
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int oldbit;
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asm volatile (
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"btcl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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return oldbit;
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}
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#define __test_and_change_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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__test_and_change_bit(nr, addr); \
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})
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/**
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* test_and_change_bit - Change a bit and return its new value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static inline int test_and_change_bit(int nr, volatile void *addr)
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{
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int oldbit;
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asm volatile (
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LOCK_PREFIX
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"btcl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit), "=m" (ADDR)
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: "Ir" (nr), "m" (ADDR) : "memory");
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return oldbit;
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}
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#define test_and_change_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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test_and_change_bit(nr, addr); \
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})
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static inline int constant_test_bit(int nr, const volatile void *addr)
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{
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return ((1U << (nr & 31)) &
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(((const volatile unsigned int *)addr)[nr >> 5])) != 0;
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}
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static inline int variable_test_bit(int nr, const volatile void *addr)
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{
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int oldbit;
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asm volatile (
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"btl %2,%1\n\tsbbl %0,%0"
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: "=r" (oldbit)
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: "m" (CONST_ADDR), "Ir" (nr) : "memory" );
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return oldbit;
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}
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#define test_bit(nr, addr) ({ \
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if ( bitop_bad_size(addr) ) __bitop_bad_size(); \
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(__builtin_constant_p(nr) ? \
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constant_test_bit((nr),(addr)) : \
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variable_test_bit((nr),(addr))); \
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})
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extern unsigned int __find_first_bit(
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const unsigned long *addr, unsigned int size);
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extern unsigned int __find_next_bit(
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const unsigned long *addr, unsigned int size, unsigned int offset);
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extern unsigned int __find_first_zero_bit(
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const unsigned long *addr, unsigned int size);
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extern unsigned int __find_next_zero_bit(
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const unsigned long *addr, unsigned int size, unsigned int offset);
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static inline unsigned int __scanbit(unsigned long val, unsigned long max)
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{
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asm ( "bsf %1,%0 ; cmovz %2,%0" : "=&r" (val) : "r" (val), "r" (max) );
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return (unsigned int)val;
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}
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/**
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* find_first_bit - find the first set bit in a memory region
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* @addr: The address to start the search at
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* @size: The maximum size to search
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*
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* Returns the bit-number of the first set bit, not the number of the byte
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* containing a bit.
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*/
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#define find_first_bit(addr,size) \
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((__builtin_constant_p(size) && (size) <= BITS_PER_LONG ? \
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(__scanbit(*(const unsigned long *)addr, size)) : \
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__find_first_bit(addr,size)))
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/**
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* find_next_bit - find the first set bit in a memory region
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* @addr: The address to base the search on
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* @offset: The bitnumber to start searching at
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* @size: The maximum size to search
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*/
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#define find_next_bit(addr,size,off) \
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((__builtin_constant_p(size) && (size) <= BITS_PER_LONG ? \
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((off) + (__scanbit((*(const unsigned long *)addr) >> (off), size))) : \
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__find_next_bit(addr,size,off)))
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/**
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* find_first_zero_bit - find the first zero bit in a memory region
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* @addr: The address to start the search at
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* @size: The maximum size to search
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*
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* Returns the bit-number of the first zero bit, not the number of the byte
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* containing a bit.
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*/
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#define find_first_zero_bit(addr,size) \
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((__builtin_constant_p(size) && (size) <= BITS_PER_LONG ? \
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(__scanbit(~*(const unsigned long *)addr, size)) : \
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__find_first_zero_bit(addr,size)))
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/**
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* find_next_zero_bit - find the first zero bit in a memory region
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* @addr: The address to base the search on
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* @offset: The bitnumber to start searching at
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* @size: The maximum size to search
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*/
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#define find_next_zero_bit(addr,size,off) \
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((__builtin_constant_p(size) && (size) <= BITS_PER_LONG ? \
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((off)+(__scanbit(~(((*(const unsigned long *)addr)) >> (off)), size))) : \
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__find_next_zero_bit(addr,size,off)))
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/**
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* find_first_set_bit - find the first set bit in @word
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* @word: the word to search
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*
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* Returns the bit-number of the first set bit. The input must *not* be zero.
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*/
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static inline unsigned int find_first_set_bit(unsigned long word)
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{
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asm ( "bsf %1,%0" : "=r" (word) : "r" (word) );
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return (unsigned int)word;
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}
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/**
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* ffs - find first bit set
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* @x: the word to search
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*
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* This is defined the same way as the libc and compiler builtin ffs routines.
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*/
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#if 0
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static inline int ffs(unsigned long x)
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{
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long r;
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asm ( "bsf %1,%0\n\t"
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"jnz 1f\n\t"
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"mov $-1,%0\n"
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"1:" : "=r" (r) : "rm" (x));
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return (int)r+1;
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}
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#endif
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/**
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* fls - find last bit set
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* @x: the word to search
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*
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* This is defined the same way as ffs.
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*/
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static inline int fls(unsigned long x)
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{
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long r;
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asm ( "bsr %1,%0\n\t"
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"jnz 1f\n\t"
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"mov $-1,%0\n"
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"1:" : "=r" (r) : "rm" (x));
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return (int)r+1;
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}
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/**
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* hweightN - returns the hamming weight of a N-bit word
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* @x: the word to weigh
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*
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* The Hamming Weight of a number is the total number of bits set in it.
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*/
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#define hweight64(x) generic_hweight64(x)
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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#endif /* _X86_BITOPS_H */
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