mirror of
https://github.com/xen-project/xen.git
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kaf24@freefall.cl.cam.ac.uk
908871cf62
Rename Xen public interfaces.
1. hypervisor-if.h is now xen.h
2. hypervisor-ifs/ directory is now:
<include/public/...> in Xen
<asm/xen-public/...> in Linux
<xen/...> in user space
651 lines
17 KiB
C
651 lines
17 KiB
C
/******************************************************************************
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* hypervisor.h
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*
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* Linux-specific hypervisor handling.
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*
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* Copyright (c) 2002-2004, K A Fraser
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*
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* This file may be distributed separately from the Linux kernel, or
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* incorporated into other software packages, subject to the following license:
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this source file (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify,
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* merge, publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef __HYPERVISOR_H__
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#define __HYPERVISOR_H__
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/version.h>
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#include <asm/xen-public/xen.h>
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#include <asm/xen-public/dom0_ops.h>
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#include <asm/xen-public/io/domain_controller.h>
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#include <asm/ptrace.h>
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#include <asm/page.h>
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/* arch/xen/i386/kernel/setup.c */
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union xen_start_info_union
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{
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start_info_t xen_start_info;
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char padding[512];
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};
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extern union xen_start_info_union xen_start_info_union;
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#define xen_start_info (xen_start_info_union.xen_start_info)
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/* arch/xen/kernel/process.c */
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void xen_cpu_idle (void);
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/* arch/xen/i386/kernel/hypervisor.c */
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void do_hypervisor_callback(struct pt_regs *regs);
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/* arch/xen/i386/mm/init.c */
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/* NOTE: caller must call flush_page_update_queue() */
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#define PROT_ON 1
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#define PROT_OFF 0
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void /* __init */ protect_page(pgd_t *dpgd, void *page, int mode);
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void /* __init */ protect_pagetable(pgd_t *dpgd, pgd_t *spgd, int mode);
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/* arch/xen/i386/kernel/head.S */
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void lgdt_finish(void);
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/* arch/xen/i386/mm/hypervisor.c */
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/*
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* NB. ptr values should be PHYSICAL, not MACHINE. 'vals' should be already
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* be MACHINE addresses.
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*/
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extern unsigned int mmu_update_queue_idx;
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void queue_l1_entry_update(pte_t *ptr, unsigned long val);
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void queue_l2_entry_update(pmd_t *ptr, unsigned long val);
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void queue_pt_switch(unsigned long ptr);
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void queue_tlb_flush(void);
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void queue_invlpg(unsigned long ptr);
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void queue_pgd_pin(unsigned long ptr);
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void queue_pgd_unpin(unsigned long ptr);
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void queue_pte_pin(unsigned long ptr);
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void queue_pte_unpin(unsigned long ptr);
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void queue_set_ldt(unsigned long ptr, unsigned long bytes);
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void queue_machphys_update(unsigned long mfn, unsigned long pfn);
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void xen_l1_entry_update(pte_t *ptr, unsigned long val);
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void xen_l2_entry_update(pmd_t *ptr, unsigned long val);
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void xen_pt_switch(unsigned long ptr);
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void xen_tlb_flush(void);
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void xen_invlpg(unsigned long ptr);
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void xen_pgd_pin(unsigned long ptr);
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void xen_pgd_unpin(unsigned long ptr);
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void xen_pte_pin(unsigned long ptr);
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void xen_pte_unpin(unsigned long ptr);
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void xen_set_ldt(unsigned long ptr, unsigned long bytes);
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void xen_machphys_update(unsigned long mfn, unsigned long pfn);
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#define MMU_UPDATE_DEBUG 0
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#if MMU_UPDATE_DEBUG > 0
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typedef struct {
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void *ptr;
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unsigned long val, pteval;
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void *ptep;
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int line; char *file;
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} page_update_debug_t;
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extern page_update_debug_t update_debug_queue[];
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#define queue_l1_entry_update(_p,_v) ({ \
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update_debug_queue[mmu_update_queue_idx].ptr = (_p); \
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update_debug_queue[mmu_update_queue_idx].val = (_v); \
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update_debug_queue[mmu_update_queue_idx].line = __LINE__; \
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update_debug_queue[mmu_update_queue_idx].file = __FILE__; \
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queue_l1_entry_update((_p),(_v)); \
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})
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#define queue_l2_entry_update(_p,_v) ({ \
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update_debug_queue[mmu_update_queue_idx].ptr = (_p); \
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update_debug_queue[mmu_update_queue_idx].val = (_v); \
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update_debug_queue[mmu_update_queue_idx].line = __LINE__; \
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update_debug_queue[mmu_update_queue_idx].file = __FILE__; \
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queue_l2_entry_update((_p),(_v)); \
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})
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#endif
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#if MMU_UPDATE_DEBUG > 1
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#if MMU_UPDATE_DEBUG > 2
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#undef queue_l1_entry_update
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#define queue_l1_entry_update(_p,_v) ({ \
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update_debug_queue[mmu_update_queue_idx].ptr = (_p); \
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update_debug_queue[mmu_update_queue_idx].val = (_v); \
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update_debug_queue[mmu_update_queue_idx].line = __LINE__; \
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update_debug_queue[mmu_update_queue_idx].file = __FILE__; \
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printk("L1 %s %d: %p/%08lx (%08lx -> %08lx)\n", __FILE__, __LINE__, \
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(_p), virt_to_machine(_p), pte_val(*(_p)), \
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(unsigned long)(_v)); \
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queue_l1_entry_update((_p),(_v)); \
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})
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#endif
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#undef queue_l2_entry_update
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#define queue_l2_entry_update(_p,_v) ({ \
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update_debug_queue[mmu_update_queue_idx].ptr = (_p); \
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update_debug_queue[mmu_update_queue_idx].val = (_v); \
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update_debug_queue[mmu_update_queue_idx].line = __LINE__; \
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update_debug_queue[mmu_update_queue_idx].file = __FILE__; \
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printk("L2 %s %d: %p/%08lx (%08lx -> %08lx)\n", __FILE__, __LINE__, \
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(_p), virt_to_machine(_p), pmd_val(*_p), \
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(unsigned long)(_v)); \
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queue_l2_entry_update((_p),(_v)); \
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})
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#define queue_pt_switch(_p) ({ \
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printk("PTSWITCH %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
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queue_pt_switch(_p); \
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})
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#define queue_tlb_flush() ({ \
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printk("TLB FLUSH %s %d\n", __FILE__, __LINE__); \
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queue_tlb_flush(); \
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})
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#define queue_invlpg(_p) ({ \
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printk("INVLPG %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
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queue_invlpg(_p); \
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})
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#define queue_pgd_pin(_p) ({ \
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printk("PGD PIN %s %d: %08lx/%08lx\n", __FILE__, __LINE__, (_p), \
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phys_to_machine(_p)); \
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queue_pgd_pin(_p); \
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})
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#define queue_pgd_unpin(_p) ({ \
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printk("PGD UNPIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
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queue_pgd_unpin(_p); \
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})
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#define queue_pte_pin(_p) ({ \
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printk("PTE PIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
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queue_pte_pin(_p); \
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})
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#define queue_pte_unpin(_p) ({ \
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printk("PTE UNPIN %s %d: %08lx\n", __FILE__, __LINE__, (_p)); \
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queue_pte_unpin(_p); \
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})
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#define queue_set_ldt(_p,_l) ({ \
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printk("SETL LDT %s %d: %08lx %d\n", __FILE__, __LINE__, (_p), (_l)); \
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queue_set_ldt((_p), (_l)); \
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})
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#endif
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void _flush_page_update_queue(void);
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static inline int flush_page_update_queue(void)
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{
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unsigned int idx = mmu_update_queue_idx;
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if ( idx != 0 ) _flush_page_update_queue();
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return idx;
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}
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#define xen_flush_page_update_queue() (_flush_page_update_queue())
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#define XEN_flush_page_update_queue() (_flush_page_update_queue())
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void MULTICALL_flush_page_update_queue(void);
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#ifdef CONFIG_XEN_PHYSDEV_ACCESS
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/* Allocate a contiguous empty region of low memory. Return virtual start. */
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unsigned long allocate_empty_lowmem_region(unsigned long pages);
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/* Deallocate a contiguous region of low memory. Return it to the allocator. */
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void deallocate_lowmem_region(unsigned long vstart, unsigned long pages);
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#endif
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/*
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* Assembler stubs for hyper-calls.
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*/
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static inline int
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HYPERVISOR_set_trap_table(
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trap_info_t *table)
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{
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int ret;
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unsigned long ignore;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ignore)
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: "0" (__HYPERVISOR_set_trap_table), "1" (table)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_mmu_update(
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mmu_update_t *req, int count, int *success_count)
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{
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int ret;
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unsigned long ign1, ign2, ign3;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
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: "0" (__HYPERVISOR_mmu_update), "1" (req), "2" (count),
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"3" (success_count)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_set_gdt(
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unsigned long *frame_list, int entries)
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{
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int ret;
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unsigned long ign1, ign2;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1), "=c" (ign2)
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: "0" (__HYPERVISOR_set_gdt), "1" (frame_list), "2" (entries)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_stack_switch(
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unsigned long ss, unsigned long esp)
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{
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int ret;
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unsigned long ign1, ign2;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1), "=c" (ign2)
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: "0" (__HYPERVISOR_stack_switch), "1" (ss), "2" (esp)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_set_callbacks(
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unsigned long event_selector, unsigned long event_address,
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unsigned long failsafe_selector, unsigned long failsafe_address)
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{
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int ret;
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unsigned long ign1, ign2, ign3, ign4;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
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: "0" (__HYPERVISOR_set_callbacks), "1" (event_selector),
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"2" (event_address), "3" (failsafe_selector), "4" (failsafe_address)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_fpu_taskswitch(
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void)
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{
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int ret;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret) : "0" (__HYPERVISOR_fpu_taskswitch) : "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_yield(
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void)
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{
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int ret;
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unsigned long ign;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign)
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: "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_yield)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_block(
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void)
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{
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int ret;
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unsigned long ign1;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1)
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: "0" (__HYPERVISOR_sched_op), "1" (SCHEDOP_block)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_shutdown(
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void)
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{
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int ret;
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unsigned long ign1;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1)
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: "0" (__HYPERVISOR_sched_op),
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"1" (SCHEDOP_shutdown | (SHUTDOWN_poweroff << SCHEDOP_reasonshift))
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_reboot(
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void)
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{
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int ret;
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unsigned long ign1;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1)
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: "0" (__HYPERVISOR_sched_op),
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"1" (SCHEDOP_shutdown | (SHUTDOWN_reboot << SCHEDOP_reasonshift))
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_suspend(
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unsigned long srec)
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{
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int ret;
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unsigned long ign1, ign2;
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/* NB. On suspend, control software expects a suspend record in %esi. */
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1), "=S" (ign2)
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: "0" (__HYPERVISOR_sched_op),
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"b" (SCHEDOP_shutdown | (SHUTDOWN_suspend << SCHEDOP_reasonshift)),
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"S" (srec) : "memory");
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return ret;
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}
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static inline long
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HYPERVISOR_set_timer_op(
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u64 timeout)
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{
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int ret;
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unsigned long timeout_hi = (unsigned long)(timeout>>32);
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unsigned long timeout_lo = (unsigned long)timeout;
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unsigned long ign1, ign2;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1), "=c" (ign2)
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: "0" (__HYPERVISOR_set_timer_op), "b" (timeout_hi), "c" (timeout_lo)
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: "memory");
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return ret;
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}
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static inline int
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HYPERVISOR_dom0_op(
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dom0_op_t *dom0_op)
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{
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int ret;
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unsigned long ign1;
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dom0_op->interface_version = DOM0_INTERFACE_VERSION;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1)
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: "0" (__HYPERVISOR_dom0_op), "1" (dom0_op)
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: "memory");
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return ret;
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}
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static inline int
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HYPERVISOR_set_debugreg(
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int reg, unsigned long value)
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{
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int ret;
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unsigned long ign1, ign2;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1), "=c" (ign2)
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: "0" (__HYPERVISOR_set_debugreg), "1" (reg), "2" (value)
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: "memory" );
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return ret;
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}
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static inline unsigned long
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HYPERVISOR_get_debugreg(
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int reg)
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{
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unsigned long ret;
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unsigned long ign;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign)
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: "0" (__HYPERVISOR_get_debugreg), "1" (reg)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_update_descriptor(
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unsigned long ma, unsigned long word1, unsigned long word2)
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{
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int ret;
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unsigned long ign1, ign2, ign3;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
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: "0" (__HYPERVISOR_update_descriptor), "1" (ma), "2" (word1),
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"3" (word2)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_set_fast_trap(
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int idx)
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{
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int ret;
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unsigned long ign;
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__asm__ __volatile__ (
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TRAP_INSTR
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: "=a" (ret), "=b" (ign)
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: "0" (__HYPERVISOR_set_fast_trap), "1" (idx)
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: "memory" );
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return ret;
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}
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static inline int
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HYPERVISOR_dom_mem_op(
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unsigned int op, unsigned long *extent_list,
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unsigned long nr_extents, unsigned int extent_order)
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{
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int ret;
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unsigned long ign1, ign2, ign3, ign4, ign5;
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__asm__ __volatile__ (
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TRAP_INSTR
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|
: "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4),
|
|
"=D" (ign5)
|
|
: "0" (__HYPERVISOR_dom_mem_op), "1" (op), "2" (extent_list),
|
|
"3" (nr_extents), "4" (extent_order), "5" (DOMID_SELF)
|
|
: "memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_multicall(
|
|
void *call_list, int nr_calls)
|
|
{
|
|
int ret;
|
|
unsigned long ign1, ign2;
|
|
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ign1), "=c" (ign2)
|
|
: "0" (__HYPERVISOR_multicall), "1" (call_list), "2" (nr_calls)
|
|
: "memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_update_va_mapping(
|
|
unsigned long page_nr, pte_t new_val, unsigned long flags)
|
|
{
|
|
int ret;
|
|
unsigned long ign1, ign2, ign3;
|
|
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
|
|
: "0" (__HYPERVISOR_update_va_mapping),
|
|
"1" (page_nr), "2" ((new_val).pte_low), "3" (flags)
|
|
: "memory" );
|
|
|
|
if ( unlikely(ret < 0) )
|
|
{
|
|
printk(KERN_ALERT "Failed update VA mapping: %08lx, %08lx, %08lx\n",
|
|
page_nr, (new_val).pte_low, flags);
|
|
BUG();
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_event_channel_op(
|
|
void *op)
|
|
{
|
|
int ret;
|
|
unsigned long ignore;
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ignore)
|
|
: "0" (__HYPERVISOR_event_channel_op), "1" (op)
|
|
: "memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_xen_version(
|
|
int cmd)
|
|
{
|
|
int ret;
|
|
unsigned long ignore;
|
|
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ignore)
|
|
: "0" (__HYPERVISOR_xen_version), "1" (cmd)
|
|
: "memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_console_io(
|
|
int cmd, int count, char *str)
|
|
{
|
|
int ret;
|
|
unsigned long ign1, ign2, ign3;
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
|
|
: "0" (__HYPERVISOR_console_io), "1" (cmd), "2" (count), "3" (str)
|
|
: "memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_physdev_op(
|
|
void *physdev_op)
|
|
{
|
|
int ret;
|
|
unsigned long ign;
|
|
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ign)
|
|
: "0" (__HYPERVISOR_physdev_op), "1" (physdev_op)
|
|
: "memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_grant_table_op(
|
|
unsigned int cmd, void *uop, unsigned int count)
|
|
{
|
|
int ret;
|
|
unsigned long ign1, ign2, ign3;
|
|
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)
|
|
: "0" (__HYPERVISOR_grant_table_op), "1" (cmd), "2" (count), "3" (uop)
|
|
: "memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_update_va_mapping_otherdomain(
|
|
unsigned long page_nr, pte_t new_val, unsigned long flags, domid_t domid)
|
|
{
|
|
int ret;
|
|
unsigned long ign1, ign2, ign3, ign4;
|
|
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)
|
|
: "0" (__HYPERVISOR_update_va_mapping_otherdomain),
|
|
"1" (page_nr), "2" ((new_val).pte_low), "3" (flags), "4" (domid) :
|
|
"memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline int
|
|
HYPERVISOR_vm_assist(
|
|
unsigned int cmd, unsigned int type)
|
|
{
|
|
int ret;
|
|
unsigned long ign1, ign2;
|
|
|
|
__asm__ __volatile__ (
|
|
TRAP_INSTR
|
|
: "=a" (ret), "=b" (ign1), "=c" (ign2)
|
|
: "0" (__HYPERVISOR_vm_assist), "1" (cmd), "2" (type)
|
|
: "memory" );
|
|
|
|
return ret;
|
|
}
|
|
|
|
#endif /* __HYPERVISOR_H__ */
|