mirror of
https://github.com/xen-project/xen.git
synced 2026-10-28 02:01:24 +01:00
Jan Beulich
b1df63afb0
Many *.c files are symlinked while building, so along with generated *.h files they ought to be removed. Conversely $(TARGET) doesn't need removing twice. Fixes:cb4fcf70b2("x86emul: parallelize SIMD test code building") Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com> master commit:774c382b28master date: 2025-11-13 09:08:27 +0100
312 lines
11 KiB
Makefile
312 lines
11 KiB
Makefile
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XEN_ROOT ?= $(CURDIR)/../../..
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include $(XEN_ROOT)/tools/Rules.mk
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TARGET := test_x86_emulator
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.PHONY: all
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all:
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.PHONY: run
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run: $(TARGET)
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./$(TARGET)
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# Add libx86 to the build
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vpath %.c $(XEN_ROOT)/xen/lib/x86
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CFLAGS += $(CFLAGS_xeninclude)
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SIMD := 3dnow sse sse2 sse4 avx avx2 xop avx512f avx512bw avx512dq avx512vbmi avx512fp16
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FMA := fma4 fma
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SG := avx2-sg avx512f-sg
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AES := ssse3-aes avx-aes avx2-vaes avx512bw-vaes
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CLMUL := ssse3-pclmul avx-pclmul avx2-vpclmulqdq avx512bw-vpclmulqdq avx512vbmi2-vpclmulqdq
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SHA := sse4-sha avx-sha avx512f-sha
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GF := sse2-gf avx2-gf avx512bw-gf
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TESTCASES := blowfish $(SIMD) $(FMA) $(SG) $(AES) $(CLMUL) $(SHA) $(GF)
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OPMASK := avx512f avx512dq avx512bw
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ifeq ($(origin XEN_COMPILE_ARCH),override)
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HOSTCFLAGS += -m32 -I..
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else
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blowfish-cflags := ""
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blowfish-cflags-x86_32 := "-mno-accumulate-outgoing-args -Dstatic="
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3dnow-vecs := 8
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3dnow-ints :=
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3dnow-flts := 4
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sse-vecs := 16
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sse-ints :=
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sse-flts := 4
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sse2-vecs := $(sse-vecs)
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sse2-ints := 1 2 4 8
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sse2-flts := 4 8
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sse4-vecs := $(sse2-vecs)
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sse4-ints := $(sse2-ints)
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sse4-flts := $(sse2-flts)
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avx-vecs := 16 32
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avx-ints :=
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avx-flts := 4 8
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fma4-vecs := $(avx-vecs)
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fma4-ints :=
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fma4-flts := $(avx-flts)
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fma-vecs := $(avx-vecs)
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fma-ints :=
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fma-flts := $(avx-flts)
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avx2-vecs := $(avx-vecs)
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avx2-ints := 1 2 4 8
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avx2-flts := 4 8
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avx2-sg-vecs := $(avx2-vecs)
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avx2-sg-idxs := 4 8
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avx2-sg-ints := 4 8
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avx2-sg-flts := 4 8
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xop-vecs := $(avx-vecs)
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xop-ints := 1 2 4 8
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xop-flts := $(avx-flts)
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avx512f-vecs := 64 16 32
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avx512f-ints := 4 8
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avx512f-flts := 4 8
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avx512f-sg-vecs := $(avx512f-vecs)
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avx512f-sg-idxs := 4 8
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avx512f-sg-ints := $(avx512f-ints)
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avx512f-sg-flts := $(avx512f-flts)
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avx512bw-vecs := $(avx512f-vecs)
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avx512bw-ints := 1 2
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avx512bw-flts :=
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avx512dq-vecs := $(avx512f-vecs)
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avx512dq-ints := $(avx512f-ints)
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avx512dq-flts := $(avx512f-flts)
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avx512vbmi-vecs := $(avx512bw-vecs)
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avx512vbmi-ints := $(avx512bw-ints)
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avx512vbmi-flts := $(avx512bw-flts)
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avx512vbmi2-vecs := $(avx512bw-vecs)
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avx512fp16-vecs := $(avx512bw-vecs)
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avx512fp16-ints :=
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avx512fp16-flts := 2
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avx512f-opmask-vecs := 2
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avx512dq-opmask-vecs := 1 2
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avx512bw-opmask-vecs := 4 8
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# Suppress building by default of the harness if the compiler can't deal
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# with some of the extensions used. Don't alter the "run" target dependencies
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# though, as this target needs to be specified manually, and things may work
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# partially even with older compilers.
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TARGET-y := $(TARGET)
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ifeq ($(filter run%,$(MAKECMDGOALS)),)
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define isa-check-cc
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TARGET-$(shell echo 'int i;' | $(CC) -x c -c -o /dev/null -m$(1) - || echo y) :=
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endef
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ISA := bmi bmi2 tbm sse4.1 sse4.2 sse4a avx avx2 f16c
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ISA += $(addprefix avx512,f bw dq)
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$(foreach isa,$(ISA),$(eval $(call isa-check-cc,$(isa))))
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# Also explicitly check for {evex} pseudo-prefix support, which got introduced
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# only after AVX512F and some of its extensions.
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TARGET-$(shell echo 'asm("{evex} vmovaps %xmm0$(comma)%xmm0");' | $(CC) -x c -c -o /dev/null - || echo y) :=
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ifeq ($(TARGET-y),)
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$(warning Test harness not built, use newer compiler than "$(CC)" (version $(shell $(CC) -dumpversion)) and an "{evex}" capable assembler)
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endif
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endif
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all: $(TARGET-y)
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# For AVX and later, have the compiler avoid XMM0 to widen coverage of
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# the VEX.vvvv checks in the emulator. For 3DNow!, however, force SSE
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# use for floating point operations, to avoid mixing MMX and FPU register
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# uses. Also enable 3DNow! extensions, but note that we can't use 3dnowa
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# as the test flavor right away since -m3dnowa is being understood only
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# by gcc 7.x and newer (older ones want a specific machine model instead).
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3dnowa := $(call cc-option,$(CC),-m3dnowa,-march=k8)
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non-sse = $(if $(filter sse%,$(1)),,$(if $(filter 3dnow%,$(1)),-msse -mfpmath=sse $(3dnowa),-ffixed-xmm0))
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define simd-defs
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$(1)-cflags := \
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$(foreach vec,$($(1)-vecs), \
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$(foreach int,$($(1)-ints), \
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"-D_$(vec)i$(int) -m$(1) $(call non-sse,$(1)) -Os -DVEC_SIZE=$(vec) -DINT_SIZE=$(int)" \
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"-D_$(vec)u$(int) -m$(1) $(call non-sse,$(1)) -Os -DVEC_SIZE=$(vec) -DUINT_SIZE=$(int)") \
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$(foreach flt,$($(1)-flts), \
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"-D_$(vec)f$(flt) -m$(1) $(call non-sse,$(1)) -Os -DVEC_SIZE=$(vec) -DFLOAT_SIZE=$(flt)")) \
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$(foreach flt,$($(1)-flts), \
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"-D_f$(flt) -m$(1) $(call non-sse,$(1)) -mfpmath=sse -Os -DFLOAT_SIZE=$(flt)")
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endef
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define simd-sg-defs
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$(1)-cflags := \
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$(foreach vec,$($(1)-vecs), \
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$(foreach idx,$($(1)-idxs), \
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$(foreach int,$($(1)-ints), \
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"-D_$(vec)x$(idx)i$(int) -m$(1:-sg=) $(call non-sse,$(1)) -Os -DVEC_MAX=$(vec) -DIDX_SIZE=$(idx) -DINT_SIZE=$(int)") \
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$(foreach flt,$($(1)-flts), \
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"-D_$(vec)x$(idx)f$(flt) -m$(1:-sg=) $(call non-sse,$(1)) -Os -DVEC_MAX=$(vec) -DIDX_SIZE=$(idx) -DFLOAT_SIZE=$(flt)")))
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endef
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define simd-aes-defs
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$(1)-cflags := $(foreach vec,$($(patsubst %-aes,sse,$(1))-vecs) $($(patsubst %-vaes,%,$(1))-vecs), \
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"-D_$(vec) -maes $(addprefix -m,$(subst -,$(space),$(1))) $(call non-sse,$(1)) -Os -DVEC_SIZE=$(vec)")
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endef
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define simd-clmul-defs
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$(1)-cflags := $(foreach vec,$($(patsubst %-pclmul,sse,$(1))-vecs) $($(patsubst %-vpclmulqdq,%,$(1))-vecs), \
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"-D_$(vec) -mpclmul $(addprefix -m,$(subst -,$(space),$(1))) $(call non-sse,$(1)) -Os -DVEC_SIZE=$(vec)")
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endef
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define simd-sha-defs
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$(1)-cflags := $(foreach vec,$(sse-vecs), \
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"-D_$(vec) $(addprefix -m,$(subst -,$(space),$(1))) -Os -DVEC_SIZE=$(vec)")
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endef
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define simd-gf-defs
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$(1)-cflags := $(foreach vec,$($(1:-gf=)-vecs), \
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"-D_$(vec) -mgfni -m$(1:-gf=) $(call non-sse,$(1)) -Os -DVEC_SIZE=$(vec)")
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endef
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define opmask-defs
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$(1)-opmask-cflags := $(foreach vec,$($(1)-opmask-vecs), "-D_$(vec) -m$(1) -Os -DSIZE=$(vec)")
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endef
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$(foreach flavor,$(SIMD) $(FMA),$(eval $(call simd-defs,$(flavor))))
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$(foreach flavor,$(SG),$(eval $(call simd-sg-defs,$(flavor))))
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$(foreach flavor,$(AES),$(eval $(call simd-aes-defs,$(flavor))))
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$(foreach flavor,$(CLMUL),$(eval $(call simd-clmul-defs,$(flavor))))
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$(foreach flavor,$(SHA),$(eval $(call simd-sha-defs,$(flavor))))
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$(foreach flavor,$(GF),$(eval $(call simd-gf-defs,$(flavor))))
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$(foreach flavor,$(OPMASK),$(eval $(call opmask-defs,$(flavor))))
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first-string = $(shell for s in $(1); do echo "$$s"; break; done)
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avx2-sg-cflags-x86_64 := "-D_high $(foreach n,7 6 5 4 3 2 1,-ffixed-ymm$(n)) $(call first-string,$(avx2-sg-cflags))"
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avx512f-sg-cflags-x86_64 := "-D_higher $(foreach n,7 6 5 4 3 2 1,-ffixed-zmm$(n)) $(call first-string,$(avx512f-sg-cflags))"
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avx512f-sg-cflags-x86_64 += "-D_highest $(foreach n,15 14 13 12 11 10 9 8,-ffixed-zmm$(n)) $(call first-string,$(avx512f-sg-cflags-x86_64))"
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$(addsuffix .h,$(TESTCASES)): %.h: %.c testcase.mk Makefile
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rm -f $@.new $*.bin
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$(foreach arch,$(filter-out $(XEN_COMPILE_ARCH),x86_32) $(XEN_COMPILE_ARCH), \
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for cflags in $($*-cflags) $($*-cflags-$(arch)); do \
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$(MAKE) -f testcase.mk TESTCASE=$* XEN_TARGET_ARCH=$(arch) $*-cflags="$$cflags" all; \
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prefix=$(shell echo $(subst -,_,$*) | sed -e 's,^\([0-9]\),_\1,'); \
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flavor=$$(echo $${cflags} | sed -e 's, .*,,' -e 'y,-=,__,') ; \
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(echo 'static const unsigned int __attribute__((section(".test, \"ax\", @progbits #")))' \
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"$${prefix}_$(arch)$${flavor}[] = {"; \
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od -v -t x $*.bin | sed -e 's/^[0-9]* /0x/' -e 's/ /, 0x/g' -e 's/$$/,/'; \
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echo "};"; \
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echo "asm(\".type $${prefix}_$(arch)$${flavor}, STT_NOTYPE;\");"; \
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echo "asm(\".type $${prefix}_$(arch)$${flavor}, STT_FUNC;\");"; \
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) >>$@.new; \
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rm -f $*.bin; \
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done; \
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)
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mv $@.new $@
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$(addsuffix -opmask.h,$(OPMASK)): %.h: opmask.S testcase.mk Makefile
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rm -f $@.new $*.bin
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$(foreach arch,$(filter-out $(XEN_COMPILE_ARCH),x86_32) $(XEN_COMPILE_ARCH), \
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for cflags in $($*-cflags) $($*-cflags-$(arch)); do \
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$(MAKE) -f testcase.mk TESTCASE=$* XEN_TARGET_ARCH=$(arch) $*-cflags="$$cflags" all; \
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prefix=$(shell echo $(subst -,_,$*) | sed -e 's,^\([0-9]\),_\1,'); \
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flavor=$$(echo $${cflags} | sed -e 's, .*,,' -e 'y,-=,__,') ; \
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(echo 'static const unsigned int __attribute__((section(".test, \"ax\", @progbits #")))' \
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"$${prefix}_$(arch)$${flavor}[] = {"; \
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od -v -t x $*.bin | sed -e 's/^[0-9]* /0x/' -e 's/ /, 0x/g' -e 's/$$/,/'; \
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echo "};"; \
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echo "asm(\".type $${prefix}_$(arch)$${flavor}, STT_NOTYPE;\");"; \
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echo "asm(\".type $${prefix}_$(arch)$${flavor}, STT_FUNC;\");"; \
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) >>$@.new; \
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rm -f $*.bin; \
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done; \
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)
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mv $@.new $@
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$(addsuffix .c,$(SIMD)):
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ln -sf simd.c $@
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$(addsuffix .c,$(FMA)):
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ln -sf simd-fma.c $@
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$(addsuffix .c,$(SG)):
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ln -sf simd-sg.c $@
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$(addsuffix .c,$(AES)):
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ln -sf simd-aes.c $@
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$(addsuffix .c,$(CLMUL)):
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ln -sf simd-clmul.c $@
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$(addsuffix .c,$(SHA)):
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ln -sf simd-sha.c $@
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$(addsuffix .c,$(GF)):
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ln -sf simd-gf.c $@
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$(addsuffix .h,$(SIMD) $(FMA) $(SG) $(AES) $(CLMUL) $(SHA) $(GF)): simd.h
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xop.h avx512f.h avx512fp16.h: simd-fma.c
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endif # 32-bit override
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OBJS := x86-emulate.o cpuid.o test_x86_emulator.o evex-disp8.o predicates.o wrappers.o
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OBJS += x86_emulate/0f01.o x86_emulate/0fae.o x86_emulate/0fc7.o
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OBJS += x86_emulate/blk.o x86_emulate/decode.o x86_emulate/fpu.o x86_emulate/util.o
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WRAPPED := $(shell sed -n 's,^ *WRAP(\([[:alnum:]_]*\));,\1,p' \
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$(firstword $(wildcard ../x86-emulate.h) x86-emulate.h))
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$(TARGET): $(OBJS)
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$(HOSTCC) $(HOSTCFLAGS) $(addprefix -Wl$(comma)--wrap=,$(WRAPPED)) -o $@ $^
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.PHONY: clean
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clean:
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rm -rf $(TARGET) *.o *~ core *.bin x86_emulate
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rm -rf $(addsuffix .h,$(TESTCASES)) $(addsuffix -opmask.h,$(OPMASK))
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rm -rf $(addsuffix .c,$(filter-out blowfish,$(TESTCASES)))
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.PHONY: distclean
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distclean: clean
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.PHONY: install uninstall
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install uninstall:
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.PHONY: run32 clean32
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ifeq ($(XEN_COMPILE_ARCH),x86_64)
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run32: $(addsuffix .h,$(TESTCASES)) $(addsuffix -opmask.h,$(OPMASK))
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run32 clean32: %32:
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$(MAKE) -C 32 HOSTCC=$(HOSTCC) $*
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clean: clean32
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else
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run32 clean32: %32: %
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endif
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.PHONY: x86_emulate
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x86_emulate:
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mkdir -p $@
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ln -sf $(XEN_ROOT)/xen/arch/x86/$@/*.[ch] $@/
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x86_emulate/%: x86_emulate ;
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HOSTCFLAGS-x86_64 := -fno-PIE
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$(call cc-option-add,HOSTCFLAGS-x86_64,HOSTCC,-no-pie)
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HOSTCFLAGS += $(CFLAGS_xeninclude) -I. $(HOSTCFLAGS-$(XEN_COMPILE_ARCH))
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x86.h := $(addprefix $(XEN_ROOT)/tools/include/xen/asm/,\
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x86-vendors.h x86-defns.h msr-index.h) \
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$(addprefix $(XEN_ROOT)/tools/include/xen/lib/x86/, \
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cpu-policy.h cpuid-autogen.h)
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x86_emulate.h := x86-emulate.h x86_emulate/x86_emulate.h x86_emulate/private.h $(x86.h)
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$(OBJS): %.o: %.c $(x86_emulate.h)
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$(HOSTCC) $(HOSTCFLAGS) -c -g -o $@ $<
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x86-emulate.o: x86_emulate/x86_emulate.c
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x86-emulate.o x86_emulate/%.o: HOSTCFLAGS += -D__XEN_TOOLS__
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# In order for our custom .type assembler directives to reliably land after
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# gcc's, we need to keep it from re-ordering top-level constructs.
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$(call cc-option-add,HOSTCFLAGS-toplevel,HOSTCC,-fno-toplevel-reorder)
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test_x86_emulator.o: HOSTCFLAGS += $(HOSTCFLAGS-toplevel)
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test_x86_emulator.o: $(addsuffix .h,$(TESTCASES)) $(addsuffix -opmask.h,$(OPMASK))
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