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Oleksii Kurochko
1e6cd4155d
Currently, RISC-V requires two extensions: _zbb and _zihintpause. This patch introduces a compiler check to check if these extensions are supported. Additionally, it introduces the riscv/booting.txt file, which contains information about the extensions that should be supported by the platform. In the future, a feature will be introduced to check whether an extension is supported at runtime. However, this feature requires functionality for parsing device tree source (DTS), which is not yet available. Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> Acked-by: Jan Beulich <jbeulich@suse.com>
17 lines
644 B
Plaintext
17 lines
644 B
Plaintext
System requirements
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===================
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The following extensions are expected to be supported by a system on which
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Xen is run:
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- Zbb:
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RISC-V doesn't have a CLZ instruction in the base ISA.
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As a consequence, __builtin_ffs() emits a library call to ffs() on GCC,
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or a de Bruijn sequence on Clang.
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Zbb extension adds a CLZ instruction, after which __builtin_ffs() emits
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a very simple sequence.
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The similar issue occurs with other __builtin_<bitop>, so it is needed to
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provide a generic version of bitops in RISC-V bitops.h
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- Zihintpause:
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On a system that doesn't have this extension, cpu_relax() should be
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implemented properly.
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