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Andrew Cooper
8d03080d2a
AMD have updated their Spectre v2 guidance, and lfence/jmp is no longer considered safe. AMD are recommending using retpoline everywhere. Retpoline is incompatible with CET. All CET-capable hardware has efficient IBRS (specifically, not something retrofitted in microcode), so use IBRS (and STIBP for consistency sake). This is a logical change on AMD, but not on Intel as the default calculations would end up with these settings anyway. Leave behind a message if IBRS is found to be missing. Also update the default heuristics to never select THUNK_LFENCE. This causes AMD CPUs to change their default to retpoline. Also update the printed message to include the AMD MSR_SPEC_CTRL settings, and STIBP now that we set it for consistency sake. This is part of XSA-398 / CVE-2021-26401. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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