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https://github.com/xen-project/xen.git
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Weiqi Wang
c161c11875
When sorting and merging overlapping ranges in
pfn_pdx_compression_setup(), the merged range is set to end where the
second range ends. If the second range is fully contained in the first,
this truncates the first range, and the tail of it is then neither
compressible nor translated correctly.
Keep the end of the merged range as the maximum of both ends.
On x86 the ranges come from the SRAT memory affinity entries, and
overlapping entries for the same node are tolerated with a warning by the
NUMA code. The caller's subsequent coverage check catches the truncated
range, so the effect is that PDX compression is disabled with a "RAM
region ... not covered" message rather than memory being mistranslated.
Add a test case that fails without this change.
Found with the ESBMC bounded model checker, and confirmed by running the
failing case natively against the unmodified code.
Fixes: c5c45bcbd6 ("pdx: introduce a new compression algorithm based on region offsets")
Assisted-by: Claude Code:claude-opus-5-5 # finding the issue with ESBMC, patch creation
Signed-off-by: Weiqi Wang <weiqi.wang-2@postgrad.manchester.ac.uk>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
302 lines
10 KiB
C
302 lines
10 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Unit tests for PDX compression.
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*
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* Copyright (C) 2025 Cloud Software Group
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*/
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#include "harness.h"
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#include "../../xen/common/pdx.c"
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struct range {
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/* Ranges are defined as [start, end). */
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unsigned long start, end;
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};
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static void print_ranges(const struct range *r)
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{
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unsigned int i;
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printf("Ranges:\n");
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for ( i = 0; i < MAX_RANGES; i++ )
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{
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if ( !r[i].start && !r[i].end )
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break;
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printf(" %013lx-%013lx\n", r[i].start, r[i].end);
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}
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}
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int main(int argc, char **argv)
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{
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static const struct {
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struct range ranges[MAX_RANGES];
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bool compress;
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} tests[] = {
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#ifdef __LP64__
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/*
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* Only for targets where unsigned long is 64bits, otherwise compiler
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* will complain about truncation from 'long long' -> 'long' conversion.
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*
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* Real memory map from a 4s Intel GNR. Not compressible using PDX
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* mask compression.
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*/
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{
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.ranges = {
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{ .start = 0, .end = 0x80000UL },
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{ .start = 0x0100000UL, .end = 0x8080000UL },
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{ .start = 0x63e80000UL, .end = 0x6be80000UL },
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{ .start = 0xc7e80000UL, .end = 0xcfe80000UL },
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{ .start = 0x12be80000UL, .end = 0x133e80000UL },
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},
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#ifdef CONFIG_PDX_OFFSET_COMPRESSION
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.compress = true,
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#else
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.compress = false,
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#endif
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},
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/* Simple hole. */
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{
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.ranges = {
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{ .start = 0,
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.end = (1UL << MAX_ORDER) * 1 },
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{ .start = (1UL << (MAX_ORDER * 2)) | 0,
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.end = (1UL << (MAX_ORDER * 2)) | (1UL << MAX_ORDER) * 1 },
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},
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.compress = true,
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},
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/* Simple hole, unsorted ranges. */
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{
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.ranges = {
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{ .start = (1UL << (MAX_ORDER * 2)) | 0,
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.end = (1UL << (MAX_ORDER * 2)) | (1UL << MAX_ORDER) * 1 },
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{ .start = 0,
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.end = (1UL << MAX_ORDER) * 1 },
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},
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.compress = true,
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},
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/* Two ranges with the same high bit set. */
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{
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.ranges = {
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{ .start = (1UL << (51 - PAGE_SHIFT)) + (1 << MAX_ORDER) * 0,
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.end = (1UL << (51 - PAGE_SHIFT)) + (1 << MAX_ORDER) * 1 },
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{ .start = (1UL << (51 - PAGE_SHIFT)) + (1 << MAX_ORDER) * 3,
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.end = (1UL << (51 - PAGE_SHIFT)) + (1 << MAX_ORDER) * 4 },
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},
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.compress = true,
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},
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#endif
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/* Range contained in a previous one. */
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{
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.ranges = {
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/* Overlapping ranges. */
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{ .start = 0, .end = (1UL << MAX_ORDER) * 2 },
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{ .start = 0, .end = (1UL << MAX_ORDER) * 1 },
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/* Extra range to force offset compression to be engaged. */
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{ .start = (1UL << MAX_ORDER) * 3,
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.end = (1UL << MAX_ORDER) * 4 },
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},
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#ifdef CONFIG_PDX_OFFSET_COMPRESSION
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.compress = true,
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#else
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.compress = false,
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#endif
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},
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/* PDX compression, 2 ranges covered by the lower mask. */
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{
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.ranges = {
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{ .start = 0,
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.end = (1 << MAX_ORDER) * 1 },
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{ .start = (1 << MAX_ORDER) * 2,
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.end = (1 << MAX_ORDER) * 3 },
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{ .start = (1 << MAX_ORDER) * 20,
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.end = (1 << MAX_ORDER) * 22 },
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},
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.compress = true,
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},
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/* Single range not starting at 0. */
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{
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.ranges = {
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{ .start = (1 << MAX_ORDER) * 10,
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.end = (1 << MAX_ORDER) * 11 },
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},
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.compress = true,
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},
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/* Resulting PDX region size leads to no compression. */
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{
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.ranges = {
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{ .start = 0,
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.end = (1 << MAX_ORDER) * 1 },
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{ .start = (1 << MAX_ORDER) * 2,
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.end = (1 << MAX_ORDER) * 3 },
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{ .start = (1 << MAX_ORDER) * 4,
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.end = (1 << MAX_ORDER) * 7 },
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{ .start = (1 << MAX_ORDER) * 8,
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.end = (1 << MAX_ORDER) * 12 },
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},
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.compress = false,
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},
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/* AMD Versal Gen 2 ARM board. */
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{
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.ranges = {
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{ .start = 0, .end = 0x80000UL },
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{ .start = 0x800000UL, .end = 0x880000UL },
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{ .start = 0x50000000UL, .end = 0x50080000UL },
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{ .start = 0x60000000UL, .end = 0x60080000UL },
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{ .start = 0x70000000UL, .end = 0x70080000UL },
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},
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.compress = true,
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},
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/* Unsorted ranges, lower one not starting at 0. */
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{
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.ranges = {
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{ .start = (1UL << (35 - PAGE_SHIFT)) + (1 << MAX_ORDER) * 2,
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.end = (1UL << (35 - PAGE_SHIFT)) + (1 << MAX_ORDER) * 3 },
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{ .start = (1 << MAX_ORDER) * 2,
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.end = (1 << MAX_ORDER) * 3 },
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},
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.compress = true,
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},
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/* AMD Naples Epyc 7281 2 sockets, 8 NUMA nodes. */
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{
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.ranges = {
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{ .start = 0, .end = 0xa0UL },
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{ .start = 0x100UL, .end = 0xb0000UL },
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{ .start = 0x100000UL, .end = 0x430000UL },
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{ .start = 0x430000UL, .end = 0x830000UL },
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{ .start = 0x830000UL, .end = 0xc30000UL },
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{ .start = 0xc30000UL, .end = 0x1030000UL },
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{ .start = 0x1030000UL, .end = 0x1430000UL },
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{ .start = 0x1430000UL, .end = 0x1830000UL },
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{ .start = 0x1830000UL, .end = 0x1c30000UL },
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{ .start = 0x1c30000UL, .end = 0x2030000UL },
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},
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.compress = false,
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},
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/* 2-node 2GB per-node QEMU layout. */
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{
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.ranges = {
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{ .start = 0, .end = 0x80000UL },
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{ .start = 0x100000UL, .end = 0x180000UL },
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},
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.compress = true,
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},
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/* Not compressible, smaller than MAX_ORDER. */
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{
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.ranges = {
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{ .start = 0, .end = 1 },
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{ .start = 0x100UL, .end = 0x101UL },
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},
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.compress = false,
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},
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/* Compressible, requires adjusting size to (1 << MAX_ORDER). */
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{
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.ranges = {
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{ .start = 0, .end = 1 },
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{ .start = 0x100000UL, .end = 0x100001UL },
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},
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.compress = true,
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},
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/* 2s Intel CLX with contiguous ranges, no compression. */
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{
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.ranges = {
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{ .start = 0 , .end = 0x180000UL },
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{ .start = 0x180000UL, .end = 0x3040000UL },
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},
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.compress = false,
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},
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/*
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* Dell R740, dual socket. Merging of ranges causes mask differences
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* in PDX offset mode. Useful for checking mask calculations.
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*/
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{
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.ranges = {
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{ .start = 0x0000000UL, .end = 0x0080000UL },
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{ .start = 0x0100000UL, .end = 0x3070000UL },
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{ .start = 0x3070000UL, .end = 0x3870000UL },
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{ .start = 0x3870000UL, .end = 0x6870000UL },
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{ .start = 0x6870000UL, .end = 0x7070000UL },
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},
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.compress = false,
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},
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};
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int ret_code = EXIT_SUCCESS;
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for ( unsigned int i = 0 ; i < ARRAY_SIZE(tests); i++ )
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{
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unsigned int j;
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pfn_pdx_compression_reset();
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for ( j = 0; j < ARRAY_SIZE(tests[i].ranges); j++ )
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{
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unsigned long size = tests[i].ranges[j].end -
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tests[i].ranges[j].start;
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if ( !tests[i].ranges[j].start && !tests[i].ranges[j].end )
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break;
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pfn_pdx_add_region(pfn_to_paddr(tests[i].ranges[j].start),
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pfn_to_paddr(size));
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}
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if ( pfn_pdx_compression_setup(0) != tests[i].compress )
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{
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printf("PFN compression diverge, expected %scompressible\n",
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tests[i].compress ? "" : "un");
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print_ranges(tests[i].ranges);
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ret_code = EXIT_FAILURE;
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continue;
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}
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if ( !tests[i].compress )
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continue;
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for ( j = 0; j < ARRAY_SIZE(tests[i].ranges); j++ )
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{
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unsigned long start = tests[i].ranges[j].start;
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unsigned long end = tests[i].ranges[j].end;
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if ( !start && !end )
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break;
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if ( !pdx_is_region_compressible(pfn_to_paddr(start), 1) ||
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!pdx_is_region_compressible(pfn_to_paddr(end - 1), 1) )
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{
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printf(
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"PFN compression invalid, pages %#lx and %#lx should be compressible\n",
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start, end - 1);
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print_ranges(tests[i].ranges);
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ret_code = EXIT_FAILURE;
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}
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if ( start != pdx_to_pfn(pfn_to_pdx(start)) ||
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end - 1 != pdx_to_pfn(pfn_to_pdx(end - 1)) )
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{
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printf("Compression is not bi-directional:\n");
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printf(" PFN %#lx -> PDX %#lx -> PFN %#lx\n",
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start, pfn_to_pdx(start), pdx_to_pfn(pfn_to_pdx(start)));
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printf(" PFN %#lx -> PDX %#lx -> PFN %#lx\n",
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end - 1, pfn_to_pdx(end - 1),
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pdx_to_pfn(pfn_to_pdx(end - 1)));
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print_ranges(tests[i].ranges);
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ret_code = EXIT_FAILURE;
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}
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}
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}
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return ret_code;
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}
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/*
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* Local variables:
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* mode: C
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* c-file-style: "BSD"
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* c-basic-offset: 4
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* indent-tabs-mode: nil
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* End:
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*/
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