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The Xen platform PCI device (vendor ID 0x5853) exposed to x86 HVM guests doesn't have the functionality of a traditional PCI device. The exposed MMIO BAR is used by some guests (including Linux) as a safe place to map foreign memory, including the grant table itself. Traditionally BARs from devices have the uncacheable (UC) cache attribute from the MTRR, to ensure correct functionality of such devices. hvmloader mimics this behavior and sets the MTRR attributes of both the low and high PCI MMIO windows (where BARs of PCI devices reside) as UC in MTRR. This however causes performance issues for users of the Xen platform PCI device BAR, as for the purposes of mapping remote memory there's no need to use the UC attribute. On Intel systems this is worked around by using iPAT, that allows the hypervisor to force the effective cache attribute of a p2m entry regardless of the guest PAT value. AMD however doesn't have an equivalent of iPAT, and guest PAT values are always considered. Linux commit: 41925b105e34 xen: replace xen_remap() with memremap() Attempted to mitigate this by forcing mappings of the grant-table to use the write-back (WB) cache attribute. However Linux memremap() takes MTRRs into account to calculate which PAT type to use, and seeing the MTRR cache attribute for the region being UC the PAT also ends up as UC, regardless of the caller having requested WB. As a workaround to allow current Linux to map the grant-table as WB using memremap() introduce an xl.cfg option (xen_platform_pci_bar_uc=0) that can be used to select whether the Xen platform PCI device BAR will have the UC attribute in MTRR. Such workaround in hvmloader should also be paired with a fix for Linux so it attempts to change the MTRR of the Xen platform PCI device BAR to WB by itself. Overall, the long term solution would be to provide the guest with a safe range in the guest physical address space where mappings to foreign pages can be created. Some vif throughput performance figures provided by Anthoine from a 8 vCPUs, 4GB of RAM HVM guest(s) running on AMD hardware: Without this patch: vm -> dom0: 1.1Gb/s vm -> vm: 5.0Gb/s With the patch: vm -> dom0: 4.5Gb/s vm -> vm: 7.0Gb/s Reported-by: Anthoine Bourgeois <anthoine.bourgeois@vates.tech> Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Reviewed-by: Oleksii Kurochko<oleksii.kurochko@gmail.com> Acked-by: Jan Beulich <jbeulich@suse.com> # hvmloader Reviewed-by: Anthony PERARD <anthony.perard@vates.tech>
101 lines
2.7 KiB
C
101 lines
2.7 KiB
C
#ifndef __HVMLOADER_CONFIG_H__
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#define __HVMLOADER_CONFIG_H__
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#include <stdint.h>
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#include <stdbool.h>
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enum virtual_vga { VGA_none, VGA_std, VGA_cirrus, VGA_pt };
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extern enum virtual_vga virtual_vga;
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extern unsigned long igd_opregion_pgbase;
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#define IGD_OPREGION_PAGES 3
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struct bios_config {
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const char *name;
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/* BIOS ROM image bits */
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void *image;
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unsigned int image_size;
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/* Physical address to load at */
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unsigned int bios_address;
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/* ROMS */
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void (*load_roms)(void);
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void (*bios_load)(const struct bios_config *config, void *addr,
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uint32_t size, void *extra_addr);
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void (*bios_info_setup)(void);
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void (*bios_info_finish)(void);
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void (*e820_setup)(void);
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void (*acpi_build_tables)(void);
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void (*create_mp_tables)(void);
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void (*create_smbios_tables)(void);
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void (*create_pir_tables)(void);
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};
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extern struct bios_config rombios_config;
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extern struct bios_config seabios_config;
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extern struct bios_config ovmf_config;
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#define PAGE_SHIFT 12
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#define PAGE_SIZE (1ul << PAGE_SHIFT)
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extern uint8_t ioapic_version;
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#define IOAPIC_ID 0x01
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extern uint32_t *cpu_to_apicid;
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#define LAPIC_BASE_ADDRESS 0xfee00000
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#define PCI_ISA_DEVFN 0x08 /* dev 1, fn 0 */
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#define PCI_ISA_IRQ_MASK 0x0c20U /* ISA IRQs 5,10,11 are PCI connected */
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#define ACPI_TIS_HDR_ADDRESS 0xFED40F00UL
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extern uint32_t pci_mem_start;
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extern uint32_t pci_mem_end;
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extern uint64_t pci_hi_mem_start, pci_hi_mem_end;
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extern bool acpi_enabled;
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/* Memory map. */
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#define SCRATCH_PHYSICAL_ADDRESS 0x00010000
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#define HYPERCALL_PHYSICAL_ADDRESS 0x00080000
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#define VGABIOS_PHYSICAL_ADDRESS 0x000C0000
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#define HVMLOADER_PHYSICAL_ADDRESS 0x00100000
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/* Special BIOS mappings, etc. are allocated from here upwards... */
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#define RESERVED_MEMBASE 0xFC000000
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/* NB. ACPI_INFO_PHYSICAL_ADDRESS *MUST* match definition in acpi/dsdt.asl! */
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#define ACPI_INFO_PHYSICAL_ADDRESS 0xFC000000
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#define ACPI_MEMORY_DYNAMIC_START 0xFC001000
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#define RESERVED_MEMORY_DYNAMIC_START 0xFC100000
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#define RESERVED_MEMORY_DYNAMIC_END 0xFE000000
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/*
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* GUEST_RESERVED: Physical address space reserved for guest use.
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* This is not dynamically advertised to guests, so this range must *never*
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* be used for any purpose by us, in future. It must always be marked as
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* reserved in the memory map (e.g., E820_RESERVED) so that mechanisms such
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* as PCI BAR remapping do not allocate from this region.
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*/
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#define GUEST_RESERVED_START 0xFE700000
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#define GUEST_RESERVED_END 0xFE800000
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extern unsigned long scratch_start;
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#endif /* __HVMLOADER_CONFIG_H__ */
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/*
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* Local variables:
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* mode: C
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* c-file-style: "BSD"
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* c-basic-offset: 4
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* tab-width: 4
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* indent-tabs-mode: nil
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* End:
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*/
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